TLE 6251-2G Infineon Technologies, TLE 6251-2G Datasheet - Page 5

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TLE 6251-2G

Manufacturer Part Number
TLE 6251-2G
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of TLE 6251-2G

Packages
PG-DSO-14
Transmission Ratemax
1.0 Mbit/s
Quiescent Current (max.)
< 30 µA @ 5V standby
Bus Wake-up Capability
Yes
Additional Features
NSTB, WK, EN, NERR, INH, Vio
Wake-up Inputs
Bus wake-up + wake-up pin
3
3.1
Figure 2
3.2
9
Pin
1
2
3
4
5
6
7
Data Sheet
Symbol
TxD
GND
V
RxD
V
EN
INH
CC
IO
Pin Configuration
Pin Assignment
Pin Configuration
Pin Definitions and Functions
Function
Transmit Data Input;
integrated pull-up resistor to
Ground
Transceiver Supply Voltage;
100 nF decoupling capacitor to GND recommend.
Receive Data Output;
“Low” in dominant state.
Output voltage level dependent on the
Logic Supply Voltage;
Digital Supply Voltage for the logic pins TxD, RxD, EN, NERR and NSTB;
Usually connected to the supply voltage of the external microcontroller;
100 nF decoupling capacitor to GND recommend.
Mode Control Input;
Integrated pull-down resistor;
“High” for Normal operation mode.
Inhibit Output;
Open drain output to control external circuitry;
High Impedance in Sleep Mode
TxD
GND
V
RxD
V
EN
INH
CC
IO
1
2
3
4
5
6
7
5
V
IO
, “Low” for dominant state.
14
13
12
11
10
9
8
V
IO
supply
CANH
NERR
SPLIT
NSTB
CANL
WK
V
S
Rev. 1.0, 2009-05-07
Pin Configuration
TLE6251-2G

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