DS2405 Dallas Semiconductor, DS2405 Datasheet

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DS2405

Manufacturer Part Number
DS2405
Description
Manufacturer
Dallas Semiconductor
Datasheet

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FEATURES
§ Open-drain PIO pin is controlled by
§ Logic level of open drain output can be
§ PIO pin sink capability is greater than 4mA
§ Multiple DS2405s can be identified on a
§ Unique, factory-lasered and tested 64-bit
§ Built-in multidrop controller ensures
§ Reduces control, address, data, and power to
§ Directly connects to a single port pin of a
§ 8-bit family code specifies DS2405
§ 8-bit cyclic redundancy check ensures error-
§ Zero standby power required
§ Low cost TO-92, SOT-223, or 6-pin TSOC
§ 1-Wire communication operates over a wide
www.maxim-ic.com
matching 64-bit, laser-engraved registration
number associated with each device
determined over 1-Wire
control
at 0.4V
common 1-Wire bus and be turned on or off
independent of other devices on the bus
registration number (8-bit family code +48-
bit serial number +8-bit CRC tester) assures
absolute identity because no two parts are
alike
compatibility with other MicroLAN products
a single data pin
microprocessor and communicates at up to
16.3kbits/s
communications requirements to reader
free selection
surface mount package
voltage range of 2.8V to 6.0V from -40°C to
+85°C
®
bus for closed-loop
1 of 15
PIN ASSIGNMENT
PIN DESCRIPTION TSOC
Pin 1 - Ground
Pin 2 - Data
Pin 3 - PIO
Pin 4 - Ground
BOTTOM VIEW
Drawings Section
See Mech.
1
TO-92
1 2 3
DS2405
2 3
Addressable Switch
Pin 1
Pin 2
Pin 3
Pin 4-6 -No Connect
DATA
GND
PIO
TSOC PACKAGE
3.7 X 4.0 X 1.5
TOP VIEW
DS2405
TOP VIEW
- Ground
- Data
- PIO
110501
NC
NC
NC

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DS2405 Summary of contents

Page 1

... PIO pin sink capability is greater than 4mA at 0.4V § Multiple DS2405s can be identified on a common 1-Wire bus and be turned on or off independent of other devices on the bus § Unique, factory-lasered and tested 64-bit registration number (8-bit family code +48- ...

Page 2

... CRC, and an 8-bit family code (05h). The 64-bit ROM portion of the DS2405 not only creates an absolutely unique electronic identification for the device itself but also is a means to locate and change or obtain the state of the switch that is associated with the 64-bit ROM ...

Page 3

... MUST be left in the idle state if the transaction is to resume. If this does not occur and the bus is left low for more than 120 ms, one or more of the devices on the bus may be reset. In addition, the state of the PIO pin for one or more of the DS2405s on the bus may return to its default (off) condition. DS2405 MEMORY MAP Figure 1 ...

Page 4

... Reset Pulse transmitted by the bus master followed by a Presence Pulse(s) transmitted by the slave(s). The Presence Pulse lets the bus master know that at least one DS2405 is on the bus and is ready to operate. For more details, see the “1-Wire Signaling” section. ...

Page 5

... DS2405 has toggled, additional read time slots issued by the bus master will cause the DS2405 to output the logic state of its PIO pin onto the 1-Wire bus. If the pulldown is on and the PIO pin is a logical 0, the DS2405 will respond with read-0 time slots. If the pulldown is off and the PIO pin is a logical 1 (external pullup is required), the DS2405 will respond with read-1 time slot ...

Page 6

The master reads 1 bit from the 1-Wire bus. Each device will respond by placing the value of the first bit of its respective ROM data onto the 1-Wire bus. Devices 1 and 4 will place a 0 onto ...

Page 7

... DS2405 to output the logic state of its PIO pin onto the 1-Wire bus. If the pulldown is on and the PIO pin is a logical 0, the DS2405 will respond with read-0 time slots. If the pulldown is off and the PIO pin is a logical 1 (external pullup is required), the DS2405 will respond with read-1 time slots ...

Page 8

CONTROL must be a logical 0 and the PIO pin is being held low by some other device or perhaps a fault condition such as a PIO shorted to ground. ...

Page 9

ROM FUNCTIONS FLOW CHART Figure ...

Page 10

ROM FUNCTIONS FLOW CHART Figure 4 (cont ...

Page 11

... Since the DS2405 contains only the 64-bit ROM with no additional data fields, the Skip ROM is not applicable and will cause no further activity on the 1-Wire bus if executed. The DS2405 does not interfere with other 1-Wire parts on a multidrop bus that do respond to a Skip ROM (for example, a DS2405 and DS1994 on the same bus). ...

Page 12

... DS2405. During write time slots, the delay circuit determines when the DS2405 will sample the data line. For a read data time slot “0” transmitted, the delay circuit determines how long the DS2405 will hold the data line low overriding the “1” generated by the master. ...

Page 13

... DS2405 CRC GENERATION To validate the data transmitted from the DS2405, the bus master may generate a CRC value from the data received. This generated value is compared to the value stored in the last 8 bits of the DS2405. If the two CRC values match, the transmission is error-free. ...

Page 14

ABSOLUTE MAXIMUM RATINGS* Voltage on any Pin Relative to Ground Operating Temperature Range Storage Temperature Range Solder Temperature * This is a stress rating only and functional operation of the device at these or any other conditions above those indicated ...

Page 15

NOTES: 1. All voltages are referenced to ground external pullup voltage. PUP 3. Input load is to ground additional reset or communication sequence cannot begin until the reset high time has expired. 5. Read data ...

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