EUA5202 Eutech Microelectronics Inc, EUA5202 Datasheet
EUA5202
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EUA5202 Summary of contents
Page 1
... Consume SE/ BTL only 7mA of supply current during normal operation, and the EUA5202 also features a shutdown function for power sensitive applications, holding the supply current at 1µA. Block Diagram DS5202 Ver 1.6 May. 2005 2-W Stereo Audio Power Amplifier FEATURES Output Power at 3Ω ...
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... Typical Application Circuit Figure 1. EUA5202 Minimum Configuration Application Circuit Figure 2. EUA5202 Full Configuration Application Circuit DS5202 Ver 1.6 May. 2005 2 EUA5202 ...
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... Hold low foe BTL mod, hold high for SE mode I Places entire IC in shutdown mode when held high, I Sources a current proportional to the junction temperature. This terminal should be left unconnected during normal operation. 3 EUA5202 DESCRIPTION terminal (16) is held HP/ LINE terminal (16) is held low ...
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... EUA5202QIR1 EUA5202QIR0 EUA5202QIT1 EUA5202QIT0 EUA5202 □ □ □ □ DS5202 Ver 1.6 May. 2005 Marking TSSOP 24 xxxx EUA5202 TSSOP 24 xxxx EUA5202 TSSOP 24 xxxx EUA5202 TSSOP 24 xxxx EUA5202 Lead Free Code 1: Lead Free 0: Lead Packing R: Tape& Reel T: Tube Operating temperature range I: Industry Standard ...
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... Gain = = EUA5202 6V -0. +0.3V DD internally limited –40°C to 85°C –65°C to 150°C 260°C MIN NOM MAX UNIT °C -40 85 1.25 4.5 V 1.25 2.7 EUA5202 Unit Min. Typ Max µA ...
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... THD=1%, BTL, See Figure 10 P =2W, f=1KHz ,See Figure11 O V =1V, R =10kΩ, A =1V AV=10V/V THD <1%, See Figure11 f=1KHz, See Figure37 f=20-20KHz, See Figure37 f=1KHz, See Figure 40 P =700mW,BTL See Figure 36 6 EUA5202 Typ. Unit 2 W 2.2 200 m% 100 m% >20 KHz ...
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... VDD=3.3V，RL=8 ohm，SE，Av= -1V/V，f=100 & 1K & 20KHz VDD=3.3V，RL=32 ohm，SE，Po=30mW，Av= -1 &-5 &-10V/V VDD=3.3V，RL=32 ohm，SE，Av= -1V/V，Po=10 & 20 & 30mW VDD=3.3V，RL=32 ohm，SE，Av=-1V/V，f=20 & 1K & 20KHz 7 EUA5202 Figure Page ...
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... Stereo BTL & Stereo SE % THD+N=1 ，BTL，Each Channel，RL=3 & 4 & 8 ohm % THD+N=1 ，SE，Each Channel，RL=3 & 4 & 8 ohm % THD+N=1 ，BTL，Each Channel，VDD=3.3 & THD+N=1 ，SE，Each Channel，VDD=3.3 & EUA5202 ...
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... Figure 3. Figure5. Figure7. DS5202 Ver 1.6 May. 2005 Figure 4. Figure6. Figure8. 9 EUA5202 ...
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... Figure9. Figure11. Figure13. DS5202 Ver 1.6 May. 2005 Figure10. Figure12. Figure14. 10 EUA5202 ...
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... Figure15. Figure17. Figure19. DS5202 Ver 1.6 May. 2005 Figure16. Figure18. Figure20. 11 EUA5202 ...
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... Figure21. Figure23. Figure25. DS5202 Ver 1.6 May. 2005 Figure22. Figure24. Figure26. 12 EUA5202 ...
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... Figure27. Figure29. Figure31. DS5202 Ver 1.6 May. 2005 Figure28. Figure30. Figure32. 13 EUA5202 ...
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... Figure33. Figure35. Figure37. DS5202 Ver 1.6 May. 2005 Figure34. Figure36. Figure38. 14 EUA5202 ...
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... Figure39. Figure41. Figure43. DS5202 Ver 1.6 May. 2005 Figure40. Figure42. Figure44. 15 EUA5202 ...
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... Figure45. Figure47. Figure49. DS5202 Ver 1.6 May. 2005 Figure46. Figure48. Figure50. 16 EUA5202 ...
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... Figure51. Figure53. Figure55. DS5202 Ver 1.6 May. 2005 Figure52. Figure54. 17 EUA5202 ...
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... Application Information Gain Setting Resistors, R and R F The gain for each audio input of the EUA5202 is set by resistors by resistors R and R according to equation for BTL mode. R F -------------------------------- (1) = − BTL Gain 2 R I BTL mode operation brings about the factor 2 in the gain equation due to the inverting amplifier mirroring the voltage swing across the load ...
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... Power Supply Decoupling The EUA5202 is a high-performance CMOS audio amplifier that requires adequate decoupling to ensure the output total harmonic distortion (THD low as possible. Power supply decoupling also prevents oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is achieved by using two capacitors of different types of noise on the power supply leads ...
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... The rules described earlier still hold with the addition of the following relationship (see equation 10 ≤ × Ω (8) 20 EUA5202 and R resistors and --------------- (10) < I ...
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... Internal to the EUA5202, two separate amplifiers drive LOUT- and ROUT- (terminals 10 and 15).When are in high output impedance state, which configures the EUA5202 driver from LOUT + and ROUT + (terminal 3 and 22). I one-half in SE mode. Control of the be from a logic-level CMOS source, or, more typically, from a resistor divider network as shown in Figure 59. = 10kΩ ...
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... If the thermal design issues are not properly addressed, the EUA5202 will go into thermal shutdown when driving a heavy load. The thermal pad on the bottom of the EUA5202 should be soldered down to a copper pad on the circuit board. Heat can be conducted away from the thermal pad through the copper plane to ambient ...
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... DS5202 Ver 1.6 May. 2005 NOM. MAX. MIN. ------ 1.15 ------ ------ 0.10 0.000 1.00 1.05 0.031 ------ 0.30 0.007 ------ 0.20 0.004 7.80 7.90 0.303 6.40 ----- ------ 4.40 4.50 0.169 0.65 ----- ------ 0.60 0.75 0.018 ------ 0.10 ------ ------ EUA5202 Use as much copper area as possible Bottom view Exposed Pad DIMENSIONS IN INCHES NOM. MAX. ------ 0.045 ------ 0.004 0.039 0.041 ------ 0.012 ------ 0.008 0.307 0.311 0.252 ------ 0.173 0.177 0.026 ------ 0.024 0.030 ------ 0.004 ------ 8 ...