PIC16F688

Manufacturer Part NumberPIC16F688
ManufacturerMicrochip Technology Inc.
PIC16F688 datasheet
 


1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
Page 131
132
Page 132
133
Page 133
134
Page 134
135
Page 135
136
Page 136
137
Page 137
138
Page 138
139
Page 139
140
Page 140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
Page 135/202

Download datasheet (4Mb)Embed
PrevNext
DECFSZ
Decrement f, Skip if 0
Syntax:
[ label ] DECFSZ f,d
0 ≤ f ≤ 127
Operands:
d ∈ [0,1]
(f) - 1 → (destination);
Operation:
skip if result = 0
Status Affected:
None
Description:
The contents of register ‘f’ are
decremented. If ‘d’ is ‘0’, the result
is placed in the W register. If ‘d’ is
‘1’, the result is placed back in
register ‘f’.
If the result is ‘1’, the next
instruction is executed. If the
result is ‘0’, then a NOP is
executed instead, making it a
two-cycle instruction.
GOTO
Unconditional Branch
Syntax:
[ label ]
GOTO k
0 ≤ k ≤ 2047
Operands:
k → PC<10:0>
Operation:
PCLATH<4:3> → PC<12:11>
Status Affected:
None
Description:
GOTO is an unconditional branch.
The eleven-bit immediate value is
loaded into PC bits <10:0>. The
upper bits of PC are loaded from
PCLATH<4:3>. GOTO is a
two-cycle instruction.
INCF
Increment f
Syntax:
[ label ]
INCF f,d
0 ≤ f ≤ 127
Operands:
d ∈ [0,1]
(f) + 1 → (destination)
Operation:
Status Affected:
Z
Description:
The contents of register ‘f’ are
incremented. If ‘d’ is ‘0’, the result
is placed in the W register. If ‘d’ is
‘1’, the result is placed back in
register ‘f’.
© 2007 Microchip Technology Inc.
PIC16F688
INCFSZ
Increment f, Skip if 0
Syntax:
[ label ]
INCFSZ f,d
0 ≤ f ≤ 127
Operands:
d ∈ [0,1]
(f) + 1 → (destination),
Operation:
skip if result = 0
Status Affected:
None
Description:
The contents of register ‘f’ are
incremented. If ‘d’ is ‘0’, the result
is placed in the W register. If ‘d’ is
‘1’, the result is placed back in
register ‘f’.
If the result is ‘1’, the next
instruction is executed. If the
result is ‘0’, a NOP is executed
instead, making it a two-cycle
instruction.
IORLW
Inclusive OR literal with W
Syntax:
[ label ]
IORLW k
0 ≤ k ≤ 255
Operands:
(W) .OR. k → (W)
Operation:
Status Affected:
Z
Description:
The contents of the W register are
OR’ed with the eight-bit literal ‘k’.
The result is placed in the
W register.
IORWF
Inclusive OR W with f
Syntax:
[ label ]
IORWF
0 ≤ f ≤ 127
Operands:
d ∈ [0,1]
(W) .OR. (f) → (destination)
Operation:
Status Affected:
Z
Description:
Inclusive OR the W register with
register ‘f’. If ‘d’ is ‘0’, the result is
placed in the W register. If ‘d’ is
‘1’, the result is placed back in
register ‘f’.
DS41203D-page 133
f,d