MC74LVX125MG ON Semiconductor, MC74LVX125MG Datasheet

IC BUS BUFFER QD N-INV 14SOEIAJ

MC74LVX125MG

Manufacturer Part Number
MC74LVX125MG
Description
IC BUS BUFFER QD N-INV 14SOEIAJ
Manufacturer
ON Semiconductor
Series
74LVXr
Datasheet
1.MC74LVX125DTR2G.pdf (6 pages)

Specifications of MC74LVX125MG

Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
4
Number Of Bits Per Element
1
Current - Output High, Low
4mA, 4mA
Voltage - Supply
2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
14-SOIC (5.3mm Width), 14-SOP, 14-SOIJ
Logic Family
LVX
Number Of Channels Per Chip
4
Polarity
Non-Inverting
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
High Level Output Current
- 4 mA
Low Level Output Current
4 mA
Maximum Power Dissipation
180 mW
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
4 / 4
Output Type
3-State
Propagation Delay Time
13.6 ns at 2.7 V, 9.7 ns at 3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
MC74LVX125
Quad Bus Buffer
With 5 V−Tolerant Inputs
buffer. The inputs tolerate voltages up to 7.0 V, allowing the interface
of 5.0 V systems to 3.0 V systems.
High to place the output into the high impedance state.
Features
*For additional information on our Pb−Free strategy and soldering details, please
February, 2005 − Rev. 2
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
The MC74LVX125 is an advanced high speed CMOS quad bus
The MC74LVX125 requires the 3−state control input (OE) to be set
High Speed: t
Low Power Dissipation: I
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Low Noise: V
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300 mA
ESD Performance:
Pb−Free Packages are Available*
Semiconductor Components Industries, LLC, 2005
PD
OLP
= 4.4 ns (Typ) at V
= 0.5 V (Max)
Human Body Model >2000 V
Machine Model >200 V
CC
= 4 mA (Max) at T
CC
= 3.3 V
A
= 25 C
1
14
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
14
14
1
1
1
ORDERING INFORMATION
A
L, WL
Y
W, WW = Work Week
http://onsemi.com
CASE 948G
CASE 751A
SOEIAJ−14
DT SUFFIX
TSSOP−14
CASE 965
M SUFFIX
D SUFFIX
SOIC−14
= Assembly Location
= Wafer Lot
= Year
Publication Order Number:
14
1
14
14
1
1
MC74LVX125/D
DIAGRAMS
MARKING
74LVX125
AWLYWW
LVX125
ALYW
ALYW
LVX
125

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MC74LVX125MG Summary of contents

Page 1

... Human Body Model >2000 V Machine Model >200 V Pb−Free Packages are Available* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Semiconductor Components Industries, LLC, 2005 February, 2005 − Rev ...

Page 2

V OE3 D3 O3 OE2 OE0 D0 O0 OE1 D1 O1 Figure 1. 14−Lead Pinout (Top View) PIN NAMES Pins Function OEn Output Enable Inputs Dn ...

Page 3

DC ELECTRICAL CHARACTERISTICS Î Î Î Î ...

Page 4

NOISE CHARACTERISTICS (Input t r Symbol V Quiet Output Maximum Dynamic V OLP V Quiet Output Minimum Dynamic V OLV V Minimum High Level Dynamic Input Voltage IHD V Maximum Low Level Dynamic Input Voltage ILD ORDERING INFORMATION Device MC74LVX125D ...

Page 5

G −T− SEATING 14 PL PLANE 0.25 (0.010 14X REF 0.10 (0.004) 0.15 (0.006 L PIN 1 IDENT. 1 0.15 (0.006) T ...

Page 6

... E L DETAIL P VIEW American Technical Support: 800−282−9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 http://onsemi.com 6 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. ...

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