BD8904F ROHM Co. Ltd., BD8904F Datasheet
BD8904F
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BD8904F Summary of contents
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... TECHNICAL NOTE IC Card Interface ICs Built-in DC/DC converter IC card interface ICs BD8904F, BD8904FV, BD8905F, BD8906F, BD8906FV, BD8907F Overview ● This is an interface IC for smart card. It works as a bidirectional signal buffer between a smart card and a controller. Also, it supplies power to a smart card. With electrostatic breakdown voltage of more than HBM: ± ...
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... The power dissipation of the package will be as follows in case that ROHM standard PCB is used. Use of this device beyond the following the power dissipation may cause permanent damage. BD8904F, BD8905F, BD8906F, BD8907F: Pd=750mW; however, reduce 6mW per 1°C when used Ta≥25°C. BD8904FV, BD8906FV ROHM standard PCB: Size: 70× ...
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Block Diagram ● 2.7V - 5.5V VDD REF VDD DETREF R1 VDD PORADJ VDET R2 VDD VSEL VDD OFFB RSTIN CMDVCCB CLKDIV1 CLK DIV CLKDIV2 XTAL1 XT OSC XTAL2 2MHz - 26MHz AUX1C MAX 1MHz AUX2C MAX 1MHz IOC MAX ...
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... PGND 5 S2 I/O 6 VDDP 7 S1 I/O 8 VCH I/O 9 PRESB 10 PRES 11 IO I/O 12 AUX2 I/O 13 AUX1 I/O 14 CGND 15 CLK 16 RST 17 VREG 18 (BD8904F) (BD8904FV) PORADJ (BD8905F) 18 (BD8906F) TEST (BD8906FV) (BD8907F) 19 CMDVCCB 20 RSTIN 21 VDD 22 GND 23 OFFB 24 XTAL1 25 XTAL2 26 IOC I/O 27 AUX1C I/O 28 AUX2C I/O Signal Level I VDD Clock frequency selection input 1 I VDD ...
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Pin Function Diagram ● Pin Pin Name Pin Function Diagram No. 1 CLKDIV1 2 CLKDIV2 3 VSEL 4 PGND -------------------------- VDDP -------------------------- VCH 9 PRESB Pin Pin Name Pin Function Diagram No. 10 PRES ...
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Pin Pin Name Pin Function Diagram No. 17 VREG PORADJ 18 TEST CMDVCC RSTIN -------------------------- 21 VDD -------------------------- 22 GND Pin Pin No. Name 23 OFFB 24 XTAL1 25 XTAL2 26 IOC 27 AUX1C 28 AUX2C 6/16 ...
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Package ● For “XX” in the product name below, substitute 04 for BD8904, 05 for BD8905, 06 for BD8906 and 07 for BD8907. Package Name: SOP28 (Max. dimension including burr: 1PIN MARK Package Name: SSOP-B28 Fig. 4-2 SSOP-B28 Package Outer ...
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... VDD input voltage detector By connecting the resistance bridge (R1, R2: Fig the PORADJ pin, you can set the VDD supply voltage detector ( Fig.5). Approximately 16ms (BD8904F/FV, BD8905F) or 8ms (BD8906F/FV, BD8907F) after VDD voltage DETR DETF becomes higher than V (internal reset), power-on reset (alarm) will be cancelled and the IC will go into sleep mode DETR until the CMDVCCB signal turns from ...
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Activation sequence When OFFB is in the “High” state and the CMDVCCB signal from the controller turns from the activation sequence starts to activate each functional block in the following order: The RST outputs signals based ...
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... Operational sequence completion time= Max. 100μs t14 Fig. 7 Deactivation sequence VDDP Input Voltage MAX current VDDP 3.0V ≤ ≤ 5.5V 60mA VDDP < 3.0V ≤ 4.5V 20mA VDDP < 3.0V ≤ 3.1V 20mA VDDP < 3.1V ≤ 4.5V 25mA VDDP 4.5V ≤ ≤ 5.5V 60mA 10/16 = typ. 11.9μs = typ. 23.7μs = typ. 35.6μs = typ. 118.5μs Remark Except BD8904FV Application to BD8904FV ...
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Three data lines, IOC - IO, AUX1C - AUX1 and AUX2C - AUX2 transmit two-way data independently of each other. Pins for the controller side, IOC, AUX1C and AUX2C are pulled up with an 11kΩ resistor to High (VDD voltage) ...
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OFFB output The OFFB output pin indicates that the IC is ready to operate pulled up to VDD with a 20kΩ resistor. When the ready state, OFFB is High. The OFFB outputs OFF state ...
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... AUX2 VREG 12 17 AUX1 RST 13 16 CGND CLK 14 15 100nF CARD CONNECTION 0.22uF Fig. 9 13/16 +3.3V 15pF CONTROLLER 15pF +3.3V VDD 58.1KΩ 41.9KΩ * Pin 18 on BD8906F/FV, BD8907F is normally open. When PORADJ is not used with BD8904F/FV,BD8905F, pull VDD. ...
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... Function of pin 18 on different devices ● The function of pin 18 (PORADJ/TEST) for BD8904F/FV and BD8905F is different from BD8906F/FV and BD8907F; switched as indicated in the following diagram but the common chip is used. Pin18: PORADJ or TEST External resistance bridge for BD8904F/FV, BD8905F Internal resistance bridge for ...
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Precautions for use ● 1) Two capacitors for a charge pump should be placed as close as possible to the IC between S1 and S2 and between VCH and PGND so that the ESR becomes less than 100mΩ. 2) The ...
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Catalog No.08T844A '08.12 ROHM © ...
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Appendix No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM CO.,LTD. The content specified herein is subject to change for improvement without notice. The content specified herein is for the ...