ACS02D Intersil Corporation, ACS02D Datasheet

ACS02D

Manufacturer Part Number

ACS02D

Description

Radiation Hardened Quad 2-input NOR GATE

Manufacturer

Intersil Corporation

Datasheet

1.ACS02D.pdf (2 pages)

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Radiation Hardened Quad 2-Input NOR Gate

The Radiation Hardened ACS02MS is a Quad 2-Input NOR

Gate. For each gate, a HIGH level on either A or B input

results in a LOW level on the Y output. A LOW level on both

the A and B inputs results in a HIGH level on the Y output.

All inputs are buffered and the outputs are designed for

balanced propagation delay and transition times.

The ACS02MS is fabricated on a CMOS Silicon on

Sapphire (SOS) process, which provides an immunity to

Single Event Latch-up and the capability of highly reliable

performance in any radiation environment. These devices

offer significant power reduction and faster performance

when compared to ALSTTL types.

Speciﬁcations for Rad Hard QML devices are controlled

by the Defense Supply Center in Columbus (DSCC). The

SMD numbers listed below must be used when ordering.

Detailed Electrical Speciﬁcations for the ACS02MS are

contained in SMD 5962-98601. A “hot-link” is provided

on our homepage with instructions for downloading.

www.intersil.com/data/sm/index.asp

Ordering Information

Pinouts

5962F9860101VCC

ACS02D/SAMPLE-03

5962F9860101VXC

ACS02K/SAMPLE-03

5962F9860101V9A

ORDERING NUMBER

GND

TOP VIEW

ACS02MS

(SBDIP)

ACS02DMSR-03

ACS02D/SAMPLE-03

ACS02KMSR-03

ACS02K/SAMPLE-03

ACS02HMSR-03

INTERNAL MARKETING

Data Sheet

NUMBER

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

TEMP. RANGE (

Features

• QML Qualiﬁed Per MIL-PRF-38535 Requirements

• 1.25 Micron Radiation Hardened SOS CMOS

• Radiation Environment

• Input Logic Levels. . . . V

• Output Current . . . . . . . . . . . . . . . . . . . . . . . .

• Quiescent Supply Current . . . . . . . . . . . . . . 100 A (Max)

• Propagation Delay . . . . . . . . . . . . . . . . . . . . . . 12ns (Max)

Applications

• High Speed Control Circuits

• Sensor Monitoring

• Low Power Designs

-55 to 125

- Latch-Up Free Under Any Conditions

- Total Dose. . . . . . . . . . . . . . . . . . . . . . . 3 x 10

- SEU Immunity . . . . . . . . . . . . . <1 x 10

- SEU LET Threshold . . . . . . . . . . . . >100MeV/(mg/cm

GND

November 1998

14 Ld SBDIP

14 Ld Flatpack

Die

(FLATPACK)

PACKAGE

TOP VIEW

ACS02MS

= (0.3)(V

File Number

ACS02MS

), V

-10

CDIP2-T14

CDFP4-F14

N/A

DESIGNATOR

Errors/Bit/Day

= (0.7)(V

8mA (Min)

RAD(Si)

4540

)

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