GSM793E Syntec Semiconductor, GSM793E Datasheet - Page 7

• Manufacturer Part Number: GSM793E
• Description: 80CH Segment Driver
• Manufacturer: Syntec Semiconductor

Functional Description :
Clock
The CL1 is the clock to latch data on the falling edge. It latches the data input from the bi-
directional shift register at the falling edge of CL1 and transfers its outputs to the LCD driver
circuit. The CL2 is the clock to shift data on the falling edge. It shifts the serial data at the
falling of CL2 and transfers the output of each bit of the register to the latch circuit.
Shift Registers And Data I/O
The GSM793E supplies two sets of 40-bit shift register, which controls the shift direction by
SHL1 & SHL2. The SHL1 controls the 1st 40-bit shift register, and SHL2 controls the 2nd
40-bit shift register. When SHL1 is connected to VDD, the 1st shift direction is from S40 to
S1; when SHL1 is connected to VSS, the shift direction changes from S1 to S40. When
SHL2 is connected to VDD, the 2nd shift direction is from S80 to S41; when SHL2 is
connected to VSS, the shift direction changes from S41 to S80.
The DL1, DR1, DL2, DR2 are data input or output option function.
LCD Controller /Driver
SHL1
SHL2
0
1
0
1
Syntek Semiconductor Co., Ltd.
Shift Direction of Channel 1
Shift Direction of Channel 2
Shift Direction
Shift Direction
S41 à S80
S80 à S41
S1 à S40
S40 à S1
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DL1
DL2
OUT
OUT
IN
IN
DR1
DR2
OUT
OUT
IN
IN
GSM793E
V1.1