ACS280D Intersil Corporation, ACS280D Datasheet
ACS280D
Manufacturer Part Number
ACS280D
Description
Radiation Hardened 9-bit Odd/ Even Parity Generator Checker
Manufacturer
Intersil Corporation
Datasheet
1.ACS280D.pdf
(3 pages)
January 1996
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
Features
• Devices QML Qualified in Accordance with MIL-PRF-38535
• Detailed Electrical and Screening Requirements are Contained in
• 1.25 Micron Radiation Hardened SOS CMOS
• Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >300K RAD (Si)
• Single Event Upset (SEU) Immunity: <1 x 10
• SEU LET Threshold . . . . . . . . . . . . . . . . . . . . . . . >100 MEV-cm
• Dose Rate Upset . . . . . . . . . . . . . . . . >10
• Dose Rate Survivability . . . . . . . . . . . >10
• Latch-Up Free Under Any Conditions
• Military Temperature Range . . . . . . . . . . . . . . . . . . -55
• Significant Power Reduction Compared to ALSTTL Logic
• DC Operating Voltage Range . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V
• Input Logic Levels
• Input Current
• Fast Propagation Delay . . . . . . . . . . . . . . . . 23ns (Max), 15ns (Typ)
Description
The Intersil ACS280MS is a Radiation Hardened 9-bit odd/even parity
generator checker device. Both odd and even parity outputs are available
for generating or checking parity for words up to 9 bits long. Even parity
is indicated (EVEN output high) when an even number of data inputs are
high. Odd parity is indicated (ODD output high) when an odd number of
data inputs are high. Parity checking for larger words can be accom-
plished by tying EVEN output to any input of an additional ACS280MS.
The ACS280MS utilizes advanced CMOS/SOS technology to achieve
high-speed operation. This device is a member of a radiation hardened,
high-speed, CMOS/SOS Logic Family.
The ACS280MS is supplied in a 14 lead Ceramic Flatpack (K suffix) or a
Ceramic Dual-In-Line Package (D suffix).
Ordering Information
5962F9670801VCC
5962F9670801VXC
ACS280D/Sample
ACS280K/Sample
ACS280HMSR
SMD# 5962-96708 and Intersil’ QM Plan
(Typ)
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
PART NUMBER
1 A at VOL, VOH
|
TEMPERATURE RANGE
Copyright
-55
-55
o
o
C to +125
C to +125
25
25
25
©
o
o
o
Intersil Corporation 1999
C
C
C
11
12
o
o
C
C
RAD (Si)/s, 20ns Pulse
RAD (Si)/s, 20ns Pulse
-10
MIL-PRF-38535 Class V
MIL-PRF-38535 Class V
Sample
Sample
Die
Errors/Bit/Day
o
C to +125
1
SCREENING LEVEL
2
/mg
o
C
ACS280MS
Even Parity Generator Checker
Pinouts
Radiation Hardened 9-Bit Odd/
EVEN
ODD
GND
MIL-STD-1835 DESIGNATOR, CDIP2-T14,
MIL-STD-1835 DESIGNATOR, CDFP3-F14
NC
I8
I6
I7
EVEN
14 PIN CERAMIC DUAL-IN-LINE
ODD
GND
14 PIN CERAMIC FLATPACK
NC
I6
I7
I8
1
2
3
4
5
6
7
14 Lead SBDIP
14 Lead Ceramic Flatpack
14 Lead SBDIP
14 Lead Ceramic Flatpack
Die
LEAD FINISH C
LEAD FINISH C
1
2
3
4
5
6
7
TOP VIEW
TOP VIEW
Spec Number
PACKAGE
File Number
14
13
12
11
10
9
8
14
13
12
10
11
9
8
VCC
I5
I4
I3
I2
I1
I0
VCC
I5
I4
I3
I2
I1
I0
518819
3568.1
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