ACS32D Intersil Corporation, ACS32D Datasheet

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ACS32D

Manufacturer Part Number
ACS32D
Description
Radiation Hardened Quad 2-input OR GATE
Manufacturer
Intersil Corporation
Datasheet
Radiation Hardened Quad 2-Input OR Gate
The Radiation Hardened ACS32MS is a Quad 2-Input OR
Gate. For each gate, a HIGH level on either A or B input
results in a HIGH level on the Y output. A LOW level on both
the A and B inputs results in a LOW level on the Y output. All
inputs are buffered and the outputs are designed for
balanced propagation delay and transition times.
The ACS32MS is fabricated on a CMOS Silicon on Sapphire
(SOS) process, which provides an immunity to Single Event
Latch-up and the capability of highly reliable performance in
any radiation environment. These devices offer significant
power reduction and faster performance when compared to
ALSTTL types.
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed below must be used when ordering.
Detailed Electrical Specifications for the ACS32MS are
contained in SMD 5962-98624. A “hot-link” is provided
on our homepage with instructions for downloading.
www.intersil.com/data/sm/index.asp
Ordering Information
Pinouts
5962F9862401VCC
ACS32D/SAMPLE-03
5962F9862401VXC
ACS32K/SAMPLE-03
5962F9862401V9A
ORDERING NUMBER
GND
A1
B1
A2
B2
Y1
Y2
1
2
3
4
5
6
7
TOP VIEW
ACS32MS
(SBDIP)
1
ACS32DMSR-03
ACS32D/SAMPLE-03
ACS32KMSR-03
ACS32K/SAMPLE-03
ACS32HMSR-03
INTERNAL MKT. NUMBER
Data Sheet
14
13
12
11
10
9
8
V
B4
A4
Y4
B3
A3
Y3
CC
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
TEMP. RANGE (
Features
• QML Qualified Per MIL-PRF-38535 Requirements
• 1.25 Micron Radiation Hardened SOS CMOS
• Radiation Environment
• Input Logic Levels . . . . V
• Output Current . . . . . . . . . . . . . . . . . . . . . . . .
• Quiescent Supply Current . . . . . . . . . . . . . . 100 A (Max)
• Propagation Delay . . . . . . . . . . . . . . . . . . . . . . 12ns (Max)
Applications
• High Speed Control Circuits
• Sensor Monitoring
• Low Power Designs
- Latch-Up Free Under any Conditions
- Total Dose. . . . . . . . . . . . . . . . . . . . . . 3 x 10
- SEU Immunity . . . . . . . . . . . . . <1 x 10
- SEU LET Threshold . . . . . . . . . . . . >100MeV/(mg/cm
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
-55 to 125
-55 to 125
GND
A1
B1
A2
B2
Y1
Y2
November 1998
25
25
25
o
C)
14 Ld SBDIP
14 Ld SBDIP
14 Ld Flatpack
14 Ld Flatpack
Die
(FLATPACK)
1
2
3
4
5
6
7
TOP VIEW
ACS32MS
PACKAGE
IL
= (0.3)(V
File Number
14
13
12
11
10
9
8
CC
ACS32MS
), V
CDIP2-T14
CDIP2-T14
CDFP4-F14
CDFP4-F14
N/A
-10
DESIGNATOR
IH
Errors/Bit/Day
= (0.7)(V
5
8mA (Min)
RAD (Si)
V
B4
A4
Y4
B3
A3
Y3
4545
CC
CC
2
)
)

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