ADP1173 Analog Devices, ADP1173 Datasheet - Page 11

• Manufacturer Part Number: ADP1173
• Description: Micropower DC-DC Converter
• Manufacturer: Analog Devices

The internal structure of the I
Q1 is the ADP1173’s internal power switch, which is paralleled
by sense transistor Q2. The relative sizes of Q1 and Q2 are
scaled so that I
internal 80
resistors parallel the base-emitter junction of the oscillator-
disable transistor, Q3. When the voltage across R1 and R
exceeds 0.6 V, Q3 turns on and terminates the output pulse. If
only the 80
nected directly to V
1.5 A. Figures 4 and 5 gives R
values.
The delay through the current limiting circuit is approximately
2 s. If the switch ON time is reduced to less than 4 s, accu-
racy of the current trip-point is reduced. Attempting to program
a switch ON time of 2 s or less will produce spurious responses
in the switch ON time. However, the ADP1173 will still provide
a properly regulated output voltage.
PROGRAMMING THE GAIN BLOCK
The gain block of the ADP1173 can be used as a low-battery
detector, error amplifier or linear post regulator. The gain block
consists of an op amp with PNP inputs and an open-collector
NPN output. The inverting input is internally connected to the
ADP1173’s 1.245 V reference, while the noninverting input is
available at the SET pin. The NPN output transistor will sink
about 100 A.
REV. 0
V
IN
Figure 21. Current Limit Operation
OSCILLATOR
resistor and through the R
internal resistor is used (i.e., the I
Q2
Q3
is 0.5% of I
IN
), the maximum switch current will be
(EXTERNAL)
R
LIM
DRIVER
Q1
LIM
LIM
R1
. Current flows to Q2 through an
I
LIM
circuit is shown in Figure 21.
values for lower current-limit
Q2
80
(INTERNAL)
LIM
resistor. These two
SW1
Q1
LIM
pin is con-
SW2
LIM
–11–
Figure 22 shows the gain block configured as a low battery
monitor. Resistors R1 and R2 should be set to high values to
reduce quiescent current, but not so high that bias current in the
SET input causes large errors. A value of 100 k for R2 is a
good compromise. The value for R1 is then calculated from the
formula:
where V
gain block output is an open-collector NPN, a pull-up resistor
should be connected to the positive logic power supply.
Figure 23. Adding Hysteresis to the Low Battery Detector
Figure 22. Setting the Low Battery Detector Trip Point
V
BAT
V
BAT
LOBATT
R1
R2
R1
is the desired low battery trip point. Since the
R1
R2
V
LOBATT
7
7
SET
ADP1173
1.245 V
ADP1173
SET
R2
GND
1.245V
1.245mV
5
GND
REF
1.245 V
5
REF
R1 =
V
R2 = 100k
LB
= BATTERY TRIP POINT
V
V
LB
1.6M
2
IN
12.5µA
R3
V
–1.245V
2
IN
AO
AO
6
6
+5V
5V
ADP1173
100k
47k
TO
PROCESSOR
TO
PROCESSOR