ADP3041 Analog Devices, ADP3041 Datasheet - Page 13

• Manufacturer Part Number: ADP3041
• Description: TFT LCD Panel Power Module
• Manufacturer: Analog Devices

The boost regulator introduces a right half plane (RHP) zero. This
zero behaves like a zero with respect to the gain but behaves
like a pole with respect to phase. As a result, the RHP zero can
cause instability of the control loop if the bandwidth (in Hertz)
of the loop includes it.
Note that the RHP zero is dependant on the load. To optimize
the compensation, a nominal load must be chosen. Typically,
choosing an R
load works well; but make sure that this load is enough to ensure
CCM operation. The critical value of load resistance, R
CCM is given by
So for the nominal load resistance R
resistance or R
To make sure the RHP zero does not cause stability problems,
the control loop bandwidth should be set at around 1/8 the
frequency (in Hertz) of the RHP zero.
where f
Another frequency of interest is the pole caused by the output
load and output capacitor. This frequency (in Hertz) is calcu-
lated using
Note that the frequency varies with load current. Again, use the
nominal load resistance for the calculation.
REV. D
R
f RHP
f
f
C
P
Z
CRIT
1
C
(
=
=
is the crossover frequency.
1
8
2
=
Figure 2. Compensation Components
π
×



FB
)
×
1
LOAD
CRIT
f RHP
=
Z
–
R



(
V
LOAD
2
V
V
, whichever is lower.
V
OUT
×
OUT
that is halfway between no load and full
IN
1
IN
L
REF



×
×
)

 ×




C
2
f
V
SW
V
OUT
ERROR
OUT
IN
AMP
2π
R
g m
LOAD



2
×
L
COMP
LOAD
R
C
, use the half load
C
C
C2
CRIT
, for
(10)
(11)
(8)
(9)
–13–
So the compensation resistor, R
mining the open-loop gain at the crossover frequency, f
setting R
gain can be approximated (in dB) by
Once the value of the compensation resistor is determined, the
value of the compensation capacitor, C
compensation capacitor sets up a zero to cancel out the pole
created by the output load, f
varies with load current, the compensation zero should be located
approximately four times the worst-case load pole, 4 × f
one half the crossover frequency, 1/2 × f
The frequency of the compensation zero is located at
So, the value of C
If the output capacitor selected has a high ESR value, it may be
necessary to add another pole to cancel the zero introduced by
the capacitor’s ESR. The ESR zero location is determined by
So, a high frequency pole should be placed to cancel the ESR
zero or at half the switching frequency, whichever is lower. By
placing a pole at half the switching frequency, the high fre-
quency gain is rolled off for better phase margin. Note that the
high frequency pole must be at least a decade above the com-
pensation zero in order for the compensation to work properly.
If this is not the case, the high frequency pole should not be used.
After all the compensation components have been selected, the
best check for stability and response time is to observe the tran-
sient performance of the ADP3041. Adjust R
to optimize the transient response. Increasing R
G
C
C
R
f
f ESR
ZC
Z
C
C
OC
2
(
=
=
=
C
( )
=
f
to adjust the closed-loop gain to zero. The open-loop
1
2 π
C
g
2 π
m
+
× ×
× ×
)
=
×
(
=
2
20
V
π
V
2 π
OUT
C
×
FB
log
1
f
× ×
1
R
can be calculated using
ZC
f
C
1
P HF



(
×
C
V
×
×
V
10
IN
C
R
R
C
OUT
)
ESR
C
C
1
×
G
×
OC f C
R
×
20
R
(
P1
×
C
LOAD
0.65
. Since the load pole position
C
C
)
×
, can be calculated by deter-
OUT
C



C
–
)
20log
C
, can be calculated. The
C
, whichever is lower.
C




and C
ADP3041
1
+
C



C
increases
f
as necessary
f
P
C
1
C



P1
, and
2
, or at




(12)
(13)
(14)
(15)
(16)
(17)