MAX1084 Maxim, MAX1084 Datasheet - Page 14

• Manufacturer Part Number: MAX1084
• Description: 400ksps/300ksps / Single-Supply / Low-Power / Serial 10-Bit ADCs with Internal Reference
• Manufacturer: Maxim

In reality, there are other noise sources besides quanti-
zation noise, including thermal noise, reference noise,
clock jitter, etc. Therefore, SNR is computed by taking
the ratio of the RMS signal to the RMS noise, which
includes all spectral components minus the fundamen-
tal, the first five harmonics, and the DC offset.
Signal-to-noise plus distortion (SINAD) is the ratio of the
fundamental input frequency’s RMS amplitude to RMS
equivalent of all other ADC output signals.
400ksps/300ksps, Single-Supply, Low-Power,
Serial 10-Bit ADCs with Internal Reference
14
Figure 14. Power-Supply Grounding Condition
*OPTIONAL
SINAD (dB) = 20
______________________________________________________________________________________
V DD
V
DD
R* = 10Ω
0.1µF
SNR = (6.02
4.7µF
Signal-to-Noise Plus Distortion
GND
MAX1084
MAX1085
✕
log (SignalRMS / NoiseRMS)
SUPPLIES
✕
N + 1.76)dB
V
V
DD
DD
CIRCUITRY
DIGITAL
DGND
GND
Effective number of bits (ENOB) indicates the global
accuracy of an ADC at a specific input frequency and
sampling rate. An ideal ADC’s error consists of quanti-
zation noise only. With an input range equal to the full-
scale range of the ADC, calculate the effective number
of bits as follows:
Total harmonic distortion (THD) is the ratio of the RMS
sum of the first five harmonics of the input signal to the
fundamental itself. This is expressed as:
where V1 is the fundamental amplitude, and V2 through
V5 are the amplitudes of the 2nd- through 5th-order
harmonics, respectively.
Spurious-free dynamic range (SFDR) is the ratio of RMS
amplitude of the fundamental (maximum signal compo-
nent) to the RMS value of the next-largest distortion
component.
TRANSISTOR COUNT: 4286
PROCESS: BiCMOS
___________________Chip Information
THD
ENOB = (SINAD - 1.76) / 6.02
=
20
Spurious-Free Dynamic Range
×
LOG
Total Harmonic Distortion
Effective Number of Bits
V
2
2
+
V
3
2
V
1
+
V
4
2
+
V
5
2