ATA6621 ATMEL Corporation, ATA6621 Datasheet - Page 13

• Manufacturer Part Number: ATA6621
• Manufacturer: ATMEL Corporation

3.16
3.16.1
4887B–AUTO–01/06
Watchdog
Typical Timing Sequence with R
Figure 3-7.
The watchdog anticipates a trigger signal from the microcontroller at the NTRIG (negative edge)
or the PTRIG (positive edge) input within a period time window of T
exceed a minimum time t
generated at output NRES. The timing basis of the watchdog is provided by the internal oscilla-
tor, of which the time period T
In Silent or Sleep Mode, the watchdog is switched off to reduce current consumption.
Minimum time for first watchdog pulse is required after the undervoltage reset at NRES disap-
pears and is defined as lead time t
The trigger signal T
For example, with an external resistor of R
watchdog come out as follows:
t
t
t
t
t
OSC
d
1
2
nres
= 3922
= 800
= 840
= 157
= 12.5 µs due to 51 k
12.5 µs = 10 ms
12.5 µs = 10.5 ms
12.5 µs = 49 ms
12.5 µs = 1.96 ms
Power Dissipation: Safe Operating Area versus V
Voltage V
wd_osc
wd
is adjustable between 2.9 ms and 33 ms via the external resistor R
40
30
20
50
45
35
25
55
10
15
0
S
5
= 51 k
trigmin
5
at Different Ambient Temperatures
6
osc
> 3 µs. If a triggering signal is not received, a reset signal will be
is adjustable via the external resistor R
7
d
.
8
9
10
wd_oscSC
11
V
S
12
(V)
= 51 k ±1%, the typical parameters of the
13
14
15
T
T
amb
CC
amb
16
= 125˚C
= 105˚C
Output Current and Supply
17
wd
. The trigger signal must
18
wd_osc
19
(10 k to 120 k ).
ATA6621
wd_osc
13
.