Si7405DN-DS Vishay Intertechnology, Si7405DN-DS Datasheet

Si7405DN-DS

Manufacturer Part Number

Si7405DN-DS

Description

Ds-spice Model For Si7405DN

Manufacturer

Vishay Intertechnology

Datasheet

1.SI7405DN-DS.pdf (3 pages)

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CHARACTERISTICS

DESCRIPTION

SUBCIRCUIT MODEL SCHEMATIC

This document is intended as a SPICE modeling guideline and does not constitute a commercial product data sheet. Designers should refer to the appropriate

data sheet of the same number for guaranteed specification limits.

Document Number: 71644

05-Jun-01

• P-Channel Vertical DMOS

• Macro Model (Subcircuit Model)

• Level 3 MOS

The attached spice model describes the typical electrical

characteristics of the p-channel vertical DMOS.

mode

temperature ranges under the pulsed 0-to-5V gate drive. The

saturated output impedance is best fit at the gate bias near the

threshold voltage.

is extracted and optimized over the −55 to 125°C

P-Channel 12-V (D-S) MOSFET

The subcircuit

SPICE Device Model Si7405DN

• Apply for both Linear and Switching Application

• Accurate over the −55 to 125°C Temperature Range

• Model the Gate Charge, Transient, and Diode Reverse Recovery

A novel gate-to-drain feedback capacitance network is used to model

the gate charge characteristics while avoiding convergence difficulties

of the switched C

to provide a best fit to the measured electrical data and are not

intended as an exact physical interpretation of the device.

Characteristics

model. All model parameter values are optimized

Vishay Siliconix

www.vishay.com

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