MAX5061 Maxim Integrated Products, MAX5061 Datasheet - Page 16

• Manufacturer Part Number: MAX5061
• Description: (MAX5060 / MAX5061) Average-Current-Mode DC-DC Controllers
• Manufacturer: Maxim Integrated Products

0.6V to 5.5V Output, Parallelable,
Average-Current-Mode DC-DC Controllers
The MAX5060/MAX5061 are high-performance average-
current-mode PWM controllers. The average-current-
mode control technique offers inherently stable
operation, reduces component derating and size by
accurately controlling the inductor current. This also
improves the current-sharing accuracy when paralleling
multiple converters. The devices achieve high efficiency,
at high current (up to 30A) with a minimum number of
external components. The high- and low-side drivers
source and sink up to 4A for lower switching frequencies
while driving high-gate-charge MOSFETs.
The MAX5060’s CLKOUT output is 180° out-of-phase
with respect to the high-side driver. The CLKOUT drives
a second MAX5060 or a MAX5061 regulator out-of-
phase, reducing the input capacitor ripple current and
increasing the load current capacity. The paralleling
capability of the MAX5060/MAX5061 improves design
flexibility in applications requiring upgrades (higher load).
The MAX5060/MAX5061 consist of an inner average-
current-loop controlled by an outer-voltage-loop voltage-
error amplifier (VEA). The combined action of the inner
current loop and outer voltage loop corrects the output
voltage errors by adjusting the inductor current. The
inductor current is sensed across a current-sense resis-
tor. The differential amplifier (MAX5060) senses the out-
put right at the load for true-differential output voltage
sensing. The sensed voltage is compared against inter-
nal 0.6V reference at the error-amplifier input. The output
voltage can be set from 0.6V to 5.5V (IN
resistor-divider at SENSE+ and SENSE-.
The MAX5060/MAX5061 accept a 4.75V to 5.5V or 7V
to 28V input voltage range. All internal control circuitry
operates from an internally regulated nominal voltage
of 5V (V
internal V
The V
ble of sourcing up to 60mA. Bypass the V
with 4.7µF and 0.1µF low-ESR ceramic capacitors for
high-frequency noise rejection and stable operation.
The MAX5060 uses V
high-side drivers, while the MAX5061 uses the V
power internal circuitry as well as the low- and high-
side driver supply. In the case of the MAX5061, use
16
______________________________________________________________________________________
CC
CC
output voltage is a regulated 5V output capa-
CC
). For input voltages of 7V or greater, the
regulator steps the voltage down to 5V.
Detailed Description
DD
to power the low-side and
IN, V
CC
CC
, and V
7V) using a
to SGND
CC
DD
to
one or more 0.1µF low-ESR ceramic capacitors
between V
to high-current driver switching.
The TQFN-28 and TSSOP-16 are thermally enhanced
packages and can dissipate up to 2.7W and 1.7W,
respectively. The high-power packages allow the
high-frequency, high-current buck converter to oper-
ate from a 12V or 24V bus. Calculate power dissipa-
tion in the MAX5060/MAX5061 as a product of the
input voltage and the total V
rent (I
gate-drive current (I
where Q
low-side and high-side external MOSFETs at V
5V, I
cy of the converter.
The MAX5060/MAX5061 include an undervoltage lock-
out with hysteresis and a power-on-reset circuit for con-
verter turn-on and monotonic rise of the output voltage.
The UVLO rising threshold is internally set at 4.35V with
a 200mV hysteresis. Hysteresis at UVLO eliminates
chattering during startup.
Most of the internal circuitry, including the oscillator,
turns on when the input voltage reaches 4V. The
MAX5060/MAX5061 draw up to 3.5mA of current
before the input voltage reaches the UVLO threshold.
The MAX5060/MAX5061 has an internal digital soft-start
for a monotonic, glitch-free rise of output voltage. Soft-
start is achieved by the controlled rise of error amplifier
dominant input in steps using a 5-bit counter and a 5-bit
DAC. The soft-start DAC generates a linear ramp from 0
to 0.7V. This voltage is applied to the error amplifier at a
third (noninverting) input. As long as the soft-start volt-
age is lower than the reference voltage, the system will
converge to that lower reference value. Once the soft-
start DAC output reaches 0.6V, the reference takes over
and the DAC output continues to climb to 0.7V assuring
that it is out of the way of the reference voltage.
Q
CC
is 3.5mA (typ), and f
G1
). I
CC
I
and Q
CC
CC
and PGND to reject the noise spikes due
= I
includes quiescent current (I
Undervoltage Lockout (UVLO)
Q
G2
DD
P
+ [f
D
are the total gate charge of the
):
= V
SW
IN
SW
x (Q
x I
CC
is the switching frequen-
CC
G1
regulator output cur-
+ Q
G2
)]
Soft-Start
GATE
Q
) and
=