MAX791 Maxim, MAX791 Datasheet - Page 16

• Manufacturer Part Number: MAX791
• Description: Microprocessor Supervisory Circuit
• Manufacturer: Maxim

The power-fail comparator can be used to monitor a
negative supply voltage using Figure 15’s circuit. When
the negative supply is valid, PFO is low. When the neg-
ative supply voltage drops, PFO goes high. This cir-
cuit’s accuracy is affected by the PFI threshold toler-
ance, the V
The backup battery may be disconnected while V
above the reset threshold. No precautions are neces-
sary to avoid spurious reset pulses.
While issuing resets to the µP during power-up, power-
down, and brownout conditions, these supervisors are
relatively immune to short-duration negative-going V
transients (glitches). It is usually undesirable to reset
the µP when V
Figure 16 shows maximum transient duration vs. reset
comparator overdrive, for which reset pulses are not
generated. The graph was produced using negative-
going V
reset threshold by the magnitude indicated (reset com-
Microprocessor Supervisory Circuit
Figure 15. Monitoring a Negative Voltage
16
PFO
+5V
NOTE: V
______________________________________________________________________________________
5 - 1.25
0V
R1
+5V
CC
=
TRIP
1.25 - V
CC
pulses, starting at 5V and ending below the
IS NEGATIVE
R2
CC
R2
R1
voltage, and resistors R1 and R2.
Negative-Going V
TRIP
Monitoring a Negative Voltage
V-
Backup-Battery Replacement
experiences only small glitches.
V
V-
TRIP
PFI
MAX791
GND
V
CC
CC
PFO
0V
Transients
CC
CC
is
parator overdrive). The graph shows the maximum
pulse width that a negative-going V
typically have without causing a reset pulse to be
issued. As the amplitude of the transient increases (i.e.,
goes farther below the reset threshold), the maximum
allowable pulse width decreases. Typically, a V
sient that goes 100mV below the reset threshold and
lasts for 40µs or less will not cause a reset pulse to be
issued.
A 100nF bypass capacitor mounted close to the V
pin provides additional transient immunity.
SWT is internally connected to a ±100nA current
source. When a capacitor is connected from SWT to
ground (to select an alternative watchdog timeout peri-
od), the current source charges and discharges the
timing capacitor to create the oscillator that controls the
watchdog timeout period. To prevent timing errors or
oscillator start-up problems, minimize external current
leakage sources at this pin, and locate the capacitor as
close to SWT as possible. The sum of PC board leak-
age + SWT capacitor leakage must be small compared
to ±100nA.
Figure 16. Maximum Transient Duration without Causing a
Reset Pulse vs. Reset Comparator Overdrive
Connecting a Timing Capacitor to SWT
100
80
60
40
20
0
10
RESET COMPARATOR OVERDRIVE (mV)
(Reset Threshold Voltage - V
100
V
T
0.1 F CAPACITOR
FROM V
CC
A
1000
= +25°C
= +5V
OUT
CC
CC
TO GND
)
transient may
10,000
CC
tran-
CC