WM8995L Wolfson Microelectronics, WM8995L Datasheet

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WM8995L

Manufacturer Part Number
WM8995L
Description
Tereo DAC
Manufacturer
Wolfson Microelectronics
Datasheet
w
DESCRIPTION
The WM8955L is a low power, high quality stereo DAC with
integrated headphone and loudspeaker amplifiers, designed to
reduce external component requirements in portable digital
audio applications.
The on-chip headphone amplifiers can deliver 40mW into a 16
load. Advanced on-chip digital signal processing performs bass
and treble tone control.
The WM8955L can operate as a master or a slave, and
includes an on-chip PLL. It can use most master clock
frequencies commonly found in portable systems, including
USB, GSM, CDMA or PDC clocks, or standard 256f
rates. Different audio sample rates such as 48kHz, 44.1kHz,
8kHz and many others are supported.
The WM8955L operates on supply voltages from 1.8V up to
3.6V, although the digital core can operate on a separate supply
down to 1.42V, saving power. Different sections of the chip can
also be powered down under software control.
The WM8955L is supplied in a very small and thin 5x5mm QFN
package, ideal for use in hand-held and portable systems.
BLOCK DIAGRAM
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FEATURES
APPLICATIONS
DAC SNR 98dB, THD -86dB (‘A’ weighted @ 48kHz, 3.3V)
On-chip 400mW BTL Speaker Driver (mono)
On-chip Headphone Driver
Stereo and Mono Line-in mix into DAC output
Separately Mixed Stereo and Mono Outputs
Digital Tone Control and Bass Boost
Low Power
Low Supply Voltages
Master clocks supported: GSM, CDMA, PDC, USB or
Audio sample rates supported: 8, 11.025, 12, 16, 22.05, 24,
32-lead QFN package, 5x5x0.9mm size, 0.5mm lead pitch
Smartphone / Multimedia Phone
Digital Audio Player
-
-
-
-
-
-
standard audio clocks
32, 44.1, 48, 88.2, 96kHz
40mW output power on 16
SNR 96dB, THD –79dB at 20mW with 16
Down to 7mW for stereo playback (1.8V / 1.5V supplies)
10 W Shutdown Mode
Analogue and Digital I/O: 1.8V to 3.6V
Digital core: 1.42V to 3.6V
Copyright
Production Data, March 2006, Rev 4.2
2006 Wolfson Microelectronics plc
WM8955L
/ 3.3V
www.DataSheet4U.com
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WM8995L Summary of contents

Page 1

... Master clocks supported: GSM, CDMA, PDC, USB or standard audio clocks Audio sample rates supported: 8, 11.025, 12, 16, 22.05, 24, 32, 44.1, 48, 88.2, 96kHz 32-lead QFN package, 5x5x0.9mm size, 0.5mm lead pitch APPLICATIONS Smartphone / Multimedia Phone Digital Audio Player Production Data, March 2006, Rev 4.2 Copyright 2006 Wolfson Microelectronics plc www.DataSheet4U.com WM8955L / 3.3V load ...

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WM8955L DESCRIPTION .......................................................................................................1 FEATURES.............................................................................................................1 APPLICATIONS .....................................................................................................1 BLOCK DIAGRAM .................................................................................................1 TABLE OF CONTENTS .........................................................................................2 PIN CONFIGURATION...........................................................................................3 ORDERING INFORMATION ..................................................................................3 PIN DESCRIPTION ................................................................................................4 RECOMMENDED OPERATING CONDITIONS .....................................................5 ELECTRICAL CHARACTERISTICS ......................................................................6 TERMINOLOGY............................................................................................................. 7 OUTPUT PGA’S LINEARITY ......................................................................................... 8 HEADPHONE OUTPUT THD VERSUS POWER........................................................... ...

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Production Data PIN CONFIGURATION TOP VIEW ORDERING INFORMATION ORDER CODE TEMPERATURE RANGE WM8955LSEFL - +85 C WM8955LSEFL/R - +85 C Note: Reel quantity = 3,500 w PACKAGE MOISTURE SENSITIVITY LEVEL 32-lead QFN (5x5x0.9mm) MSL1 (Pb-free) 32-lead ...

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WM8955L PIN DESCRIPTION PIN NO NAME 1 MCLK Digital Input 2 DCVDD 3 DBVDD 4 DGND 5 BCLK Digital Input / Output Digital Input 6 DACDAT Digital Input / Output 7 DACLRC 8 CLKOUT Digital Output 9 PLLGND 10 MONOOUT ...

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Production Data ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical ...

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WM8955L ELECTRICAL CHARACTERISTICS Test Conditions DCVDD = 1.5V, AVDD = HPVDD = 3.3V, T PARAMETER SYMBOL DAC to Line-Out (L/ROUT1 with 10k Signal to Noise Ratio SNR (A-weighted) Total Harmonic Distortion THD Channel Separation Analogue Mixer Inputs (LINEINL/R to L/ROUT1 ...

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Production Data Test Conditions DCVDD = 1.5V, AVDD = HPVDD = 3.3V, T PARAMETER SYMBOL Analogue Reference Levels Midrail Reference Voltage VMID Buffered Reference Voltage VREF Digital Input / Output Input HIGH Level Input LOW Level Output HIGH Level V ...

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WM8955L OUTPUT PGA’S LINEARITY 10 0 Output PGA Gains -10 -20 -30 -40 -50 -60 - 1.75 Output PGA Gain Step Size 1.5 1.25 1 0.75 0.5 0. ...

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Production Data HEADPHONE OUTPUT THD VERSUS POWER 0 Headphone Power vs THD+N (16 Ohm load) -20 -40 -60 -80 -100 Headphone Power vs THD+N (32 Ohm load) -20 -40 -60 -80 -100 ...

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WM8955L SPEAKER THD AND NOISE VERSUS POWER WM8955 L/ROUT2 8R BTL Speaker Load THD+NvPo THD referenced to 0.95Vrms 0 -10 -20 THD+N -30 (dB) -40 -50 -60 -70 -80 -90 -100 0.00 50.00 100.00 w AVDD=HPVDD=DBVDD=3.3V DCVDD=1.42V 1.013kHz sinewave input ...

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Production Data POWER CONSUMPTION The power consumption of the WM8955L depends on the following factors. Supply voltages: Reducing the supply voltages also reduces supply currents, and therefore results in significant power savings. Operating mode: Power consumption is lower in mono ...

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WM8955L AUDIO PATHS OVERVIEW w www.DataSheet4U.com Production Data PD Rev 4.2 March 2006 12 ...

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Production Data SIGNAL TIMING REQUIREMENTS SYSTEM CLOCK TIMING MCLK Figure 1 System Clock Timing Requirements Test Conditions CLKDIV2 = 0, DCVDD = 1.42V, DBVDD = 3.3V, DGND = 0V, T unless otherwise stated. PARAMETER System Clock Timing Information MCLK System ...

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WM8955L Test Conditions DBVDD = 3.3V, DGND = 0V +25 A PARAMETER System Clock Timing Information DACLRC propagation delay from BCLK falling edge DACDAT setup time to BCLK rising edge DACDAT hold time from BCLK rising edge AUDIO ...

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Production Data Test Conditions = +25 DBVDD = 3.3V, DGND = 0V PARAMETER Program Register Input Information SCLK rising edge to CSB rising edge SCLK pulse cycle time SCLK pulse width low SCLK pulse width high SDIN to ...

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WM8955L INTERNAL POWER ON RESET CIRCUIT AVDD Figure 6 Internal Power on Reset Circuit Schematic The WM8955 includes an internal Power-On-Reset Circuit, as shown in Figure 6, which is used to reset the digital logic into a default state after ...

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Production Data DEVICE DESCRIPTION INTRODUCTION The WM8955L is a low power audio DAC offering a combination of high quality audio, advanced features, low power and small size. These characteristics make it ideal for portable digital audio applications such as portable ...

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WM8955L DIGITAL VOLUME CONTROL The WM8955L has on-chip digital attenuation from –127dB to 0dB in 0.5dB steps, allowing the user to adjust the volume of each channel separately. The level of attenuation for an eight-bit code X is given by: ...

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Production Data TONE CONTROL The WM8955L provides separate controls for bass and treble with programmable gains and filter characteristics. This function operates on digital audio data before it is passed to the audio DACs. Bass control can take two different ...

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WM8955L DIGITAL TO ANALOGUE CONVERTER (DAC) Treble and linear bass enhancement may produce signals that exceed full-scale. In order to avoid limiting under these conditions recommended to set the DAT bit to attenuate the digital input signal by ...

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Production Data LINE INPUTS AND OUTPUT MIXERS The WM8955L provides the option to mix the DAC output signal with analogue line-in signals from the LINEINL, LINEINR and MONOIN+ and MONOIN- pins. The level of the mixed-in signals can be controlled ...

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WM8955L REGISTER ADDRESS R36 (24h) Right Mixer (1) R37 (25h) Right Mixer (2) Table 8 Right Output Mixer Control REGISTER ADDRESS R38 (26h) Mono Mixer (1) R39 (27h) Mono Mixer (2) Table 9 Mono Output Mixer Control Note: The mono ...

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Production Data DIFFERENTIAL MONO LINE-IN The WM8955L can take either a single-ended or a differential mono signal and mix it into the LOUT1/2 and ROUT1/2 outputs. In both cases, LINEINL and LINEINR still remain available as stereo line-in. Differential mono ...

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WM8955L ANALOGUE OUTPUTS ENABLING THE OUTPUTS Each analogue output of the WM8955L can be separately enabled or disabled. The analogue mixer associated with each output is powered on or off along with the output pin. All outputs are disabled by ...

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Production Data HEADPHONE SWITCH The HPDETECT pin can be used as a headphone switch control input to automatically disable the speaker output and enable the headphone output e.g. when a headphone is plugged into a jack socket. In this mode, ...

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WM8955L LOUT1/ROUT1 OUTPUTS The LOUT1 and ROUT1 pins can drive a 16 Output and Line Output sections, respectively). The signal volume on LOUT1 and ROUT1 can be independently adjusted under software control by writing to LOUT1VOL and ROUT1VOL, respectively. Note ...

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Production Data LOUT2/ROUT2 OUTPUTS The LOUT2 and ROUT2 output pins are essentially similar to LOUT1 and ROUT1, but they are independently controlled and can drive an 8 must be inverted (ROUT2INV = 1), so that the left and right channel ...

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WM8955L DIGITAL AUDIO INTERFACE The digital audio interface is used for feeding audio data into the WM8955L. It uses three pins: DACDAT: DAC data input DACLRC: DAC data alignment clock BCLK: Bit clock, for synchronisation The clock signals BCLK and ...

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Production Data Figure 15 Right Justified Audio Interface (assuming n-bit word length mode, the MSB is available on the second rising edge of BCLK following a DACLRC transition. The other bits up to the LSB are ...

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WM8955L Figure 18 DSP Mode Audio Interface (Mode B; LRP = 1) AUDIO INTERFACE CONTROL The register bits controlling audio format, word length and master / slave mode are summarised below. REGISTER ADDRESS R7 (07h) Digital Audio Interface Format Table ...

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Production Data MASTER CLOCK AND PHASE LOCKED LOOP The WM8955L has an on-chip phase-locked loop (PLL) circuit that can be used to: generate a master clock for the WM9755L audio function from another external clock, e.g. in telecoms applications. generate ...

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WM8955L The PLL frequency ratio (2Eh int ( int (2 Example: MCLK = 12MHz required clock = 12.288MHz R should be chosen to ensure 5<N<13. There is a divide by 4 and ...

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Production Data AUDIO SAMPLE RATES The WM8955L supports a wide range of master clock frequencies and can generate many commonly used audio sample rates directly from the master clock. There are two clocking modes: ‘Normal’ mode supports master clocks of ...

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WM8955L MCLK MCLK DAC SAMPLE RATE MCLKDIV2=0 MCLKDIV2=1 ‘Normal’ Clock Mode (‘*’ indicates backward compatibility with WM8711 and WM8721) 12.288MHz 24.576MHz 12 kHz (MCLK/1024) 11.2896MHz 22.5792MHz 8.0182 kHz (MCLK/1408) 11.025 kHz (MCLK/1024) 22.05 kHz (MCLK/512) 44.1 kHz (MCLK/256) 88.2 kHz ...

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Production Data CONTROL INTERFACE SELECTION OF CONTROL MODE The WM8955L is controlled by writing to registers through a serial control interface. A control word consists of 16 bits. The first 7 bits (B15 to B9) are address bits that select ...

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WM8955L Figure 21 2-Wire Serial Control Interface The WM8955L has two possible device addresses, which can be selected using the CSB pin. CSB STATE Low High Table 27 2-Wire MPU Interface Address Selection POWER SUPPLIES The WM8955L can use up ...

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Production Data POWER MANAGEMENT The WM8955L has two control registers that allow users to select which functions are active. For minimum power consumption, unused functions should be disabled. To avoid any pop or click noise important to enable ...

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WM8955L STOPPING THE MASTER CLOCK In order to minimise power consumed in the digital core of the WM8955L, the master clock should be stopped in Standby and OFF modes. If this is cannot be done externally at the clock source, ...

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Production Data REGISTER MAP REGISTER ADDRESS (BIT 15 – 9) REMARKS R0 (00h) 0000000 Reserved R1 (01h) 0000001 Reserved R2 (02h) 0000010 LOUT1 R3 (03h) 0000011 ROUT1 R4 (04h) 0000100 Reserved R5 (05h) 0000101 DAC Control R6 (06h) 0000110 Reserved ...

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WM8955L DIGITAL FILTER CHARACTERISTICS Depending on the MCLK frequency and sample rate selected, 4 different types of digital filter can be used in the DAC, called Type and 3 (see “Master Clock and Audio Sample Rates”). The ...

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Production Data 0 -20 -40 -60 -80 -100 0 0.5 1 1.5 2 Frequency (Fs) Figure 24 DAC Filter Frequency Response – Type 1 0 -20 -40 -60 -80 -100 0 0.5 1 1.5 2 Frequency (Fs) Figure 26 DAC ...

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WM8955L APPLICATIONS INFORMATION RECOMMENDED EXTERNAL COMPONENTS Figure 30 Recommended External Component Diagram w www.DataSheet4U.com Production Data PD Rev 4.2 March 2006 42 ...

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Production Data MINIMISING POP NOISE AT THE ANALOGUE OUTPUTS To minimise any pop or click noise when the system is powered up or down, the following procedures are recommended. POWER UP Switch on power supplies. By default the WM8955L is ...

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WM8955L HEADPHONE OUTPUT CONFIGURATION The analogue outputs LOUT1/ROUT1, LOUT2/ROUT2, and OUT3 can drive a 16 headphone load, either through DC blocking capacitors coupled without any capacitor. Headphone Output using DC blocking capacitors WM8955L Figure 32 Recommended Headphone Output ...

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Production Data PACKAGE DIMENSIONS FL: 32 PIN QFN PLASTIC PACKAGE SEE DETAIL A CORNER D2 TIE BAR B D2 EXPOSED 6 GROUND PADDLE ...

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... WM8955L IMPORTANT NOTICE Wolfson Microelectronics plc (WM) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current. All products are sold subject to the WM terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability ...

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