AT93C46E ATMEL Corporation, AT93C46E Datasheet

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AT93C46E

Manufacturer Part Number
AT93C46E
Description
Three-wire Serial EEPROM
Manufacturer
ATMEL Corporation
Datasheet

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Features
Description
The AT93C46E provides 1024 bits of serial electrically-erasable programmable read-
only memory (EEPROM) organized as 64 words of 16 bits each. The device is opti-
mized for use in many industrial and commercial applications where low-power and
low-voltage operation are essential. The AT93C46E is available in space-saving 8-
lead PDIP, 8-lead JEDEC SOIC, and 8-lead TSSOP packages.
The AT93C46E is enabled through the Chip Select pin (CS) and accessed via a three-
wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift Clock
(SK). Upon receiving a Read instruction at DI, the address is decoded and the data is
clocked out serially on the data output DO pin. The write cycle is completely self-timed
and no separate erase cycle is required before write. The write cycle is only enabled
when the part is in the erase/write enable state. When CS is brought high following the
initiation of a write cycle, the DO pin outputs the ready/busy status of the part.
The AT93C46E is available in 1.8V (1.8V to 5.5V) version.
Table 1. Pin Configuration
Pin Name
CS
SK
DI
DO
GND
VCC
NC
Low-voltage and Standard-voltage Operation
Internal Organization
Three-wire Serial Interface
2 MHz Clock Rate (5V) Compatibility
Self-timed Write Cycle (5 ms max)
High Reliability
8-lead PDIP, 8-lead JEDEC SOIC, and 8-lead TSSOP Packages
Lead-free/Halogen-free Devices
– 1.8 (V
– 64 x 16
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
CC
= 1.8V to 5.5V)
Function
Chip Select
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
Power Supply
No Connect
DO
CS
SK
DO
DI
CS
SK
DI
DO
CS
SK
DI
8-lead TSSOP
1
2
3
4
8-lead PDIP
1
2
3
4
1
2
3
4
8-lead SOIC
8
7
6
5
8
7
6
5
8
7
6
5
VCC
NC
NC
GND
VCC
NC
NC
GND
VCC
NC
NC
GND
Three-wire
Serial EEPROM
1K (64 x 16)
AT93C46E
Preliminary
Rev. 5207A–SEEPR–1/07
1

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AT93C46E Summary of contents

Page 1

... The AT93C46E is available in space-saving 8- lead PDIP, 8-lead JEDEC SOIC, and 8-lead TSSOP packages. The AT93C46E is enabled through the Chip Select pin (CS) and accessed via a three- wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift Clock (SK). Upon receiving a Read instruction at DI, the address is decoded and the data is clocked out serially on the data output DO pin ...

Page 2

... Absolute Maximum Ratings* Operating Temperature......................................−55°C to +125°C Storage Temperature .........................................−65°C to +150°C Voltage on Any Pin with Respect to Ground ........................................ −1.0V to +7.0V Maximum Operating Voltage .......................................... 6.25V DC Output Current........................................................ 5.0 mA AT93C46E [Preliminary] 2 *NOTICE: Figure 1. Block Diagram MEMORY ARRAY REGISTER DECODE GENERATOR Stresses beyond those listed under “Absolute Maximum Ratings” ...

Page 3

Table 2. Pin Capacitance Applicable over recommended operating range from T Symbol Test Conditions C Output Capacitance (DO) OUT C Input Capacitance (CS, SK, DI) IN Note: This parameter is characterized and is not 100% tested. Table 3. DC ...

Page 4

... Output Delay to “0” PD0 Status Valid High t DF Impedance t Write Cycle Time WP (1) Endurance 5.0V, 25°C Note: 1. This parameter is ensured by characterization. AT93C46E [Preliminary −40° 85° Test Condition 4.5V ≤ V ≤ 5.5V CC 2.7V ≤ V ≤ 5.5V CC 1.8V ≤ V ≤ 5.5V CC 4.5V ≤ V ≤ 5.5V CC 2.7V ≤ ...

Page 5

... The AT93C46E is accessed via a simple and versatile three-wire serial communication interface. Device operation is controlled by seven instructions issued by the host pro- cessor. A valid instruction starts with a rising edge of CS and consists of a start bit (logic “1”) followed by the appropriate op code and the desired memory address location. ...

Page 6

... Timing Diagrams Figure 2. Synchronous Data Timing Note: 1. This is the minimum SK period. AT93C46E [Preliminary] 6 status of the part brought high after being kept low for a minimum of 250 ns (t The WRAL instruction is valid only at V ERASE/WRITE DISABLE (EWDS): To protect against accidental data disturb, the Erase/Write Disable (EWDS) instruction disables all programming modes and should be executed after all programming operations ...

Page 7

Figure 3. READ Timing High Impedance 1 Figure 4. EWEN Timing Note: 1. Requires a minimum of nine clock cycles. 1 Figure 5. EWDS Timing Note: 1. Requires a minimum ...

Page 8

... HIGH IMPEDANCE DO (1 ),( 2 ) Figure 7. WRAL Timing HIGH IMPEDANCE DO Notes: 1. Valid only 4.5V to 5.5V Requires a minimum of nine clock cycles. Figure 8. ERASE Timing HIGH IMPEDANCE DO AT93C46E [Preliminary] 8 ... ... ... A0 A ... N-1 N BUSY READY ...

Page 9

Figure 9. ERAL Timing HIGH IMPEDANCE DO Note: 1. Valid only 4.5V to 5.5V. CC 5207A–SEEPR–1/ STANDBY CHECK STATUS BUSY HIGH IMPEDANCE ...

Page 10

... AT93C46E Ordering Information Ordering Code AT93C46E-PU (Bulk Form only) (1) AT93C46EN-SH-B (NiPdAu Lead Finish) (2) AT93C46EN-SH-T (NiPdAu Lead Finish) (1) AT93C46E-TH-B (NiPdAu Lead Finish) (2) AT93C46E-TH-T (NiPdAu Lead Finish) Notes: 1. “B” denotes bulk. 2. “-T” denotes tape and reel. SOIC = 4K per reel. TSSOP = 5K per reel. ...

Page 11

Packaging Information 8P3 – PDIP Top View PLCS Side View Notes: 1. This drawing is for general information only; refer to JEDEC Drawing MS-001, Variation BA for additional information. 2. Dimensions A and L are measured ...

Page 12

... JEDEC SOIC Top View e Side View Note: These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R AT93C46E [Preliminary TITLE 8S1, 8-lead (0.150" ...

Page 13

TSSOP Pin 1 indicator this corner N Top View Side View Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances, datums, ...

Page 14

... Revision History AT93C46E [Preliminary] 14 Doc. Rev. Date Comments 5207A 1/2007 Initial document release. 5207A–SEEPR–1/07 ...

Page 15

... Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. ©2007 Atmel Corporation. All rights reserved. Atmel marks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. Atmel Operations Memory ...

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