TSS461 ATMEL Corporation, TSS461 Datasheet - Page 28

• Manufacturer Part Number: TSS461
• Description: VAN Data Link Controller
• Manufacturer: ATMEL Corporation

IDLE: Idle Command
ACTI: Activate
Command
REAR: Re-Arbitrate
Command
MSDC: Manual System
Diagnosis Clock
Line Status Register
(0x04)
SPG: Sleeping
IDG: Idling
Sa, Sb and Sc
28
TSS461E
If the user sets the Idle bit, the circuit will enter idle mode. In idle mode the oscillator will oper-
ate, but the TSS461E will not transmit or receive anything on the bus, and the TXD output will
be in three-state
One: Idle active
Zero: Idle inactive
The Activate command will put the circuit in the active mode, i.e it will transmit and receive nor-
mally on the bus. When the circuit is in activate mode the TXD three-state output is enabled.
One: Activate active
Zero: Activate inactive
This command will, after the current attempt, reset the retry counter and re-arbitrate the mes-
sages to be transmitted in order to find the highest priority message to transmit.
One: Re-arbitrate active
Zero: Re-arbitrate inactive
Rather than using the SDC divider described in section “Diagnosis Control Register (0x02)”, the
user can use the manual SDC command to generate a SDC pulse for the diagnosis system.
This MSDC pulse should be high at least two timeslot clock.
Read only register.
•
•
Default mode at reset
Diagnosis system status bits
•
Default value after reset: 0bx01xxx00.
This register reports the operation mode of the TSS461E in the Sleep an Idle bits
(Command Register located at address 0y03) as well as the diagnosis system status bits S2
to S0 discussed in section “Diagnosis System”.
Sa and Sb
7
x
SPG
6
IDG
5
Sc
4
Sb
3
Sa
2
TXG
1
4194C–AUTO–01/06
RXG
0