PIC16C72A Microchip Technology, PIC16C72A Datasheet - Page 2

• Manufacturer Part Number: PIC16C72A
• Description: 28-Pin 8-Bit CMOS Microcontrollers
• Manufacturer: Microchip Technology

TABLE 2:
DS39566A-page 2
Address
100h
101h
102h
103h
104h
105h
106h
107h
108h
109h
10Ah
10Bh
10Ch
10Dh
10Eh
10Fh
180h
181h
182h
183h
184h
185h
186h
187h
188h
189h
18Ah
18Bh
18Ch
18Dh
18Eh
18Fh
Legend:
Note
Bank 2
Bank 3
(1)
(1
(1)
(1)
(1)
(1)
(1)
(1)
(1,2)
(1)
(1,2)
(1)
1:
2:
3:
4:
INDF
TMR0
PCL
STATUS
FSR
PORTB
PCLATH
INTCON
PMDATL
PMADRL
PMDATH
PMADRH
INDF
OPTION
PCL
STATUS
FSR
TRISB
PCLATH
INTCON
PMCON1
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented read as ‘0’, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
These registers can be addressed from any bank.
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8> whose contents
are transferred to the upper byte of the program counter.
Other (non power-up) RESETs include external RESET through MCLR and Watchdog Timer Reset.
This bit always reads as a ‘1’.
Name
—
—
—
—
—
—
—
—
—
—
—
SPECIAL FUNCTION REGISTER SUMMARY
PORTB Data Latch when written: PORTB pins when read
PORTB Data Direction Register
Addressing this location uses contents of FSR to address data memory (not a physical register)
Timer0 Module’s Register
Program Counter's (PC) Least Significant Byte
Indirect Data Memory Address Pointer
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Data Register Low Byte
Address Register Low Byte
Addressing this location uses contents of FSR to address data memory (not a physical register)
Program Counter's (PC) Least Significant Byte
Indirect Data Memory Address Pointer
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Reserved maintain clear
Reserved maintain clear
RBPU
Bit 7
—
IRP
GIE
IRP
GIE
—
—
—
—
(4)
INTEDG
PEIE
PEIE
Bit 6
RP1
RP1
—
—
—
—
—
Data Register High Byte
TMR0IE
TMR0IE
T0CS
Bit 5
RP0
RP0
—
—
—
—
Advance Information
Write Buffer for the upper 5 bits of the Program Counter
Address Register High Byte
Write Buffer for the upper 5 bits of the Program Counter
T0SE
INTE
INTE
Bit 4
TO
TO
—
RBIE
RBIE
Bit 3
PSA
PD
PD
—
TMR0IF
TMR0IF
Bit 2
PS2
—
Z
Z
Bit 1
INTF
INTF
PS1
DC
DC
—
 2002 Microchip Technology Inc.
RBIF
Bit 0
RBIF
PS0
RD
C
C
0000 0000
xxxx xxxx
0000 0000
0001 1xxx
xxxx xxxx
xxxx xxxx
---0 0000
0000 000x
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
0000 0000
1111 1111
0000 0000
0001 1xxx
xxxx xxxx
1111 1111
---0 0000
0000 000x
1--- ---0
0000 0000
0000 0000
Value on:
POR,
BOR
—
—
—
—
—
—
—
—
—
RESETS
0000 0000
uuuu uuuu
0000 0000
000q quuu
uuuu uuuu
uuuu uuuu
---0 0000
0000 000u
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
0000 0000
1111 1111
0000 0000
000q quuu
uuuu uuuu
1111 1111
---0 0000
0000 000u
1--- ---0
0000 0000
0000 0000
Value on
all other
—
—
—
—
—
—
—
—
—
(3)