APL5336 Anpec Electronics Corporation, APL5336 Datasheet
APL5336
Available stocks
Related parts for APL5336
APL5336 Summary of contents
Page 1
... VREF pin for external soft-start and shutdown control. Pulling and holding the voltage on VREF below the en- able voltage threshold shuts down the output. The output of APL5336 will be high impedance after being shut down by VREF or the thermal shutdown function. Pin Configuration 6 ...
Page 2
... Ordering and Marking Information APL5336 APL5336 APL5336 K: XXXXX Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020C for MSL classification at lead-free peak reflow temperature. ANPEC defines “ ...
Page 3
... IN I =0A, V =0.7V ~ 2.8V OUT REF Over temperature and load current ranges I =+10mA OUT I =-10mA OUT I =+10mA ~ +1.5A OUT I =-10mA ~ -1.5A OUT 3 Range Unit -1 100 0 ~ 200 330 - -40 ~ 125 =1.8V or 1.5V, V =0. = REF IN IN APL5336 Min Typ Max - 2.5 2.75 2.9 - 0.35 - 0.7 0.9 1. REF - +12 ...
Page 4
... T =125 =25 C Sourcing Current J (V =1.5V =125 =25 C Sinking Current J (V =1.5V =125 rising J 4 =0. = =10 F REF IN IN OUT APL5336 Unit Min Typ Max 1 1 -2 1.6 1.8 2.6 1 -1.6 -1.8 -2.6 -1 150 - 0.15 0.3 0.4 V -100 - +100 nA 0 ...
Page 5
... APL5336 Typical Operating Characteristics VOUT Offset Voltage vs. Junction Temperature -10mA OUT 10mA OUT =1. -50 - Junction Temperature (T Sinking Current-Limit vs. Junction Temperature 4 3 =2. =1.8V 1 =1. Sinking Current V =0.5xV 0.5 REF IN V =5V CNTL 0 -50 - Junction Temperature (T Sourcing Current-Limit vs ...
Page 6
... APL5336 Operating Waveforms 1.8V or 1.5V, V CNTL IN REF Load Transient Response (V I =10mA to 1.5A to 10mA OUT 1 2 CH1 20mV/Div, AC OUT CH2 0.5A/Div, DC OUT TIME: 200 s/Div Load Transient Response (V I =1.5A to 10mA OUT 1 2 CH1 20mV/Div, AC OUT CH2 0.5A/Div, DC OUT Copyright ANPEC Electronics Corp. ...
Page 7
... APL5336 Operating Waveforms (Cont 5V 1.8V or 1.5V, V CNTL IN REF Load Transient Response (V I =-10mA to -1.5A OUT 1 2 CH1 20mV/Div, AC OUT CH2 0.5A/Div, DC OUT TIME: 1 s/Div Load Transient Response (V I =10mA 10mA OUT OUT 2 CH1 20mV/Div, AC OUT CH2 0.5A/Div, DC OUT TIME: 200 s/Div Copyright ANPEC Electronics Corp ...
Page 8
... APL5336 Operating Waveforms (Cont 5V 1.8V or 1.5V, V CNTL IN REF Load Transient Response (V I =1A to 10mA OUT 1 2 CH1 20mV/Div, AC OUT CH2 0.5A/Div, DC OUT TIME: 1 s/Div Load Transient Response (V I =-10mA to -1A OUT 1 2 CH1 20mV/Div, AC OUT CH2 0.5A/Div, DC OUT TIME: 1 s/Div Copyright ANPEC Electronics Corp ...
Page 9
... APL5336 Operating Waveforms (Cont 5V 1.8V or 1.5V, V CNTL IN REF Power ON Test ( Load OUT I OUT 2 3 CH1 1V/Div CH2 500mV/Div, DC OUT CH3 1A/Div, DC OUT TIME: 50ms/Div Power ON Test ( Load OUT I 2 OUT 3 CH1 1V/Div CH2: V ...
Page 10
... Reference Voltage Input and Active-high Enable Control Pin. Apply a voltage to this pin as a reference voltage for the APL5336. Connect this pin to a resistor diver, between VIN and GND, and a capacitor for filtering noise purpose. Applying and holding the voltage below the enable voltage threshold on this pin by an open-drain transistor shuts down the output ...
Page 11
... VOUT pin is larger than 10M . Internal and External Soft-Start The APL5336 is designed with an internal soft-start func- tion to control the rise rate of the output voltage to prevent inrush current during start-up. When release the pull-low transistor connected with VREF ...
Page 12
... Please place the output capacitors close to the VOUT, a MLCC capacitor larger than 8 F must be placed near the VOUT. The distance from VOUT to output MLCC must be less than 10mm place APL5336 and output capacitors near the load is good for load transient response the thermal resistance ...
Page 13
... The ground planes and PCB form a heat sink to channel major power dissipation of the APL5336 into ambient air. Large ground plane is good for heatsinking. Optimum performance can only be achieved when the device is mounted board according to the board layout diagrams which are shown as Figure 2 ...
Page 14
... APL5336 Package Information SOP MIN 0.10 A2 1.25 b 0.31 c 0.17 D 4.80 5. 3. Note: 1. Follow JEDEC MS-012 AA. 2. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 6 mil per side. ...
Page 15
... APL5336 Package Information SOP- THERMAL PAD MIN 0.00 A2 1.25 b 0.31 c 0.17 D 4.80 D1 2.25 E 5.80 E1 3.80 E2 2. Note : 1. Follow JEDEC MS-012 BA. Copyright ANPEC Electronics Corp. Rev. A.2 - Apr., 2008 SOP-8P MILLIMETERS MAX. 1.60 0.15 0.51 0.25 5.00 3.50 6.20 4.00 3.00 1.27 BSC 0.50 1. Dimension "D" does not include mold flash, protrusions or gate burrs ...
Page 16
... APL5336 Carrier Tape & Reel Dimensions K0 SECTION A-A Application A H 330.0± 2.00 50 MIN. SOP-8( 4.0± 0.10 8.0± 0.10 Devices Per Unit Package Type SOP-8(P) Copyright ANPEC Electronics Corp. Rev. A.2 - Apr., 2008 P0 P2 OD0 A0 B SECTION B 12.4+2.00 13.0+0.50 1.5 MIN. 20.2 MIN. 12.0± 0.30 1.75± 0.10 -0.00 -0. 1.5+0.10 2.0± 0.05 1 ...
Page 17
... APL5336 Reflow Condition (IR/Convection or VPR Reflow Tsmax Tsmin 25 Reliability Test Program Test item SOLDERABILITY HOLT PCT TST ESD Latch-Up Classification Reflow Profiles Profile Feature Average ramp-up rate ( Preheat - Temperature Min (Tsmin) - Temperature Max (Tsmax) - Time (min to max) (ts) ...
Page 18
... APL5336 Classification Reflow Profiles (Cont.) Table 1. SnPb Eutectic Process – Package Peak Reflow Temperatures Package Thickness <2.5 mm 2.5 mm Table 2. Pb-free Process – Package Classification Reflow Temperatures Package Thickness <1.6 mm 1.6 mm – 2 Tolerance: The device manufacturer/supplier shall assure process compatibility up to and including the stated classification temperature (this means Peak reflow temperature +0 C ...