MC100EP91 ON Semiconductor, MC100EP91 Datasheet - Page 2

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MC100EP91

Manufacturer Part Number
MC100EP91
Description
NECL Output Translator
Manufacturer
ON Semiconductor
Datasheet

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Part Number:
MC100EP91MNR2G
Manufacturer:
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Quantity:
440
Table 1. PIN DESCRIPTION
1. The thermally conductive exposed pad on the package bottom (see case drawing) must be attached to a heat−sinking conduit.
19,16,13
18,15,12
14, 17
2, 5, 8
3, 6, 9
SOIC
1, 20
4, 7
N/A
10
11
Pin
19, 20, 23,
2, 18, 22
1, 21, 17
3, 4, 12
5, 8, 13
6, 9, 14
15, 16
QFN
7, 11
24
10
Name
Q[0:2]
Q[0:2]
D[0:2]
D[0:2]
GND
V
V
V
NC
EP
CC
EE
BB
Positive Level
LVCMOS, CML, HSTL Input
LVPECL, LVDS, LVTTL,
LVTTL,LVCMOS, CML,
LVPECL, LVDS,
Input
D0
D0
D1
D1
D2
D2
NECL Output
NECL Output
HSTL Input
R1
R1
R1
R1
R1
R1
I/O
R2
R2
R2
Figure 1. Logic Diagram
http://onsemi.com
Default
2
State
High
Low
Positive Supply Voltage. All V
Connected to Power Supply to Guarantee Proper Opera-
tion.
Negative Supply Voltage. All V
Connected to Power Supply to Guarantee Proper Opera-
tion.
Ground.
ECL Reference Voltage Output
Noninverted Differential Inputs [0:2]. Internal 75 kW to V
Inverted Differential Inputs [0:2]. Internal 75 kW to V
75 kW to V
(V
Noninverted Differential Outputs [0:2]. Typically Terminated
with 50 W to V
Inverted Differential Outputs [0:2]. Typically Terminated with
50 W to V
No Connect. The NC Pin is NOT Electrically Connected to
the Die and may Safely be Connected to Any Voltage from
V
Exposed Pad. (Note 1)
EE
CC
NECL Output
Q0
Q2
Q0
Q1
Q2
Q1
to V
− V
CC
EE
TT
CC
.
) / 2.
= V
. When Inputs are Left Open They Default to
TT
CC
= V
V
V
GND
V
− 2 V
CC
CC
BB
EE
Description
− 2 V
CC
EE
Pins must be Externally
Pins must be Externally
EE
and
EE
.

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