MC10H131 ON Semiconductor, MC10H131 Datasheet - Page 3

• Manufacturer Part Number: MC10H131
• Description: Dual D Type Master-Slave Flip-Flop
• Manufacturer: ON Semiconductor

1. Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
Asynchronous Set (S) and Reset (R) override Clock (C
and Clock Enable (CE) inputs. Each flip−flop may be
clocked separately by holding the common clock in the new
low state and using the enable inputs for the clocking
function. If the common clock is to be used to clock the
flip−flop, the Clock Enable inputs must be in the low state.
Table 4. ELECTRICAL CHARACTERISTICS
Table 5. AC CHARACTERISTICS
The MC10H131 is a dual master−slave type D flip−flop.
Symbol
Symbol
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is
maintained. Outputs are terminated through a 50 W resistor to −2.0 V.
V
V
t
I
V
I
V
t
f
t
hold
inH
tog
I
inL
set
OH
pd
t
OL
t
E
IH
IL
r
f
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
Power Supply Current
Input Current High
Input Current Low
High Output Voltage
Low Output Voltage
High Input Voltage
Low Input Voltage
Propagation Delay
Rise Time
Fall Time
Set−up Time
Hold Time
Toggle Frequency
Pins 6, 11
Pin 9
Pins 7, 10
Pins 4, 5, 12, 13
Clock, CE
Set, Reset
Characteristic
Characteristic
APPLICATION INFORMATION
(V
EE
= −5.2 V ±5%) (Note 1)
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−1.02
−1.95
−1.17
−1.95
Min
Min
250
0.5
0.8
0.6
0.6
0.6
0.7
0.8
−
−
−
−
−
C
)
0°
0°
3
−0.84
−1.63
−0.84
−1.48
Max
Max
controlling the common clock.
transition of the clock. A change in the information present
at the data (D) input will not affect the output information at
any other time due to master slave construction.
530
660
485
790
1.6
1.6
2.0
2.0
62
−
−
−
−
In this case, the enable inputs perform the function of
The output states of the flip−flop change on the positive
−0.98
−1.95
−1.13
−1.95
Min
Min
250
0.5
0.8
0.7
0.6
0.6
0.7
0.8
−
−
−
−
−
25°
25°
−0.81
−1.63
−0.81
−1.48
Max
Max
310
390
285
465
1.7
1.7
2.0
2.0
56
−
−
−
−
−0.92
−1.95
−1.07
−1.95
Min
Min
250
0.3
0.8
0.7
0.6
0.6
0.7
0.8
−
−
−
−
−
75°
75°
−0.735
−0.735
−1.60
−1.45
Max
Max
310
390
285
465
1.8
1.8
2.2
2.2
62
−
−
−
−
MHz
Unit
Unit
Vdc
Vdc
Vdc
Vdc
mA
mA
mA
ns
ns
ns
ns
ns