MC14049UB ON Semiconductor, MC14049UB Datasheet

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MC14049UB

Manufacturer Part Number
MC14049UB
Description
Hex Buffers
Manufacturer
ON Semiconductor
Datasheet

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MC14049UB
Hex Buffers
P–channel and N–channel enhancement mode devices in a single
monolithic structure. This complementary MOS device finds primary
use where low power dissipation and/or high noise immunity is
desired. This device provides logic–level conversion using only one
supply voltage, V
V
Loads can be driven when the device is used as CMOS–to–TTL/DTL
converters (V
13 and 16 are not connected internally on this device; consequently
connections to these terminals will not affect circuit operation.
2. Maximum Ratings are those values beyond which damage to the device
3. Temperature Derating:
static voltages or electric fields referenced to the V
must be taken to avoid applications of any voltage higher than the maximum rated
voltages to this high–impedance circuit. For proper operation, the ranges V
V
either V
MAXIMUM RATINGS
March, 2000 – Rev. 3
in
Symbol
DD
The MC14049UB hex inverter/buffer is constructed with MOS
This device contains circuitry to protect the inputs against damage due to high
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
High Source and Sink Currents
High–to–Low Level Converter
Supply Voltage Range = 3.0 V to 18 V
Meets JEDEC UB Specifications
V
Improved ESD Protection on All Inputs
Semiconductor Components Industries, LLC, 2000
may occur.
All Packages: See Figure 4.
V
v
V
T
I
V
P
T
T
I
out
IN
stg
DD
out
in
in
D
A
L
18 V and V
supply voltage for logic–level conversions. Two TTL/DTL
SS
can exceed V
or V
DC Supply Voltage Range
Input Voltage Range
Output Voltage Range
Input Current
Output Current
Power Dissipation,
Ambient Temperature Range
Storage Temperature Range
Lead Temperature
DD
DD
(DC or Transient)
(DC or Transient)
(DC or Transient) per Pin
(DC or Transient) per Pin
per Package (Note 3.)
Plastic
SOIC
(8–Second Soldering)
SS
). Unused outputs must be left open.
= 5.0 V, V
DD
v
. The input–signal high level (V
DD
V
Parameter
out
(Voltages Referenced to V
v
OL
V
DD
v
are recommended.
0.4 V, I
OL
SS
– 0.5 to V
– 0.5 to +18.0
– 0.5 to +18.0
SS
pin, only. Extra precautions
3.2 mA). Note that pins
– 55 to +125
– 65 to +150
) (Note 2.)
Value
+45
825
740
260
10
IH
DD
) can exceed the
+0.5
1
Unit
mW
mA
mA
V
V
V
SS
C
C
C
v
1. For ordering information on the EIAJ version of
MC14049UBCP
MC14049UBD
MC14049UBDR2
MC14049UBDT
MC14049UBDTR2 TSSOP–16 2500/Tape & Reel
MC14049UBF
MC14049UBFEL
the SOIC packages, please contact your local
ON Semiconductor representative.
Device
ORDERING INFORMATION
A
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
http://onsemi.com
CASE 751B
SOEIAJ–16
CASE 948F
DT SUFFIX
CASE 648
TSSOP–16
CASE 966
P SUFFIX
D SUFFIX
F SUFFIX
SOIC–16
SOEIAJ–16
SOEIAJ–16
PDIP–16
TSSOP–16
= Assembly Location
Package
SOIC–16
SOIC–16
PDIP–16
Publication Order Number:
2500/Tape & Reel
16
16
16
1
1
1
MC14049UBCP
DIAGRAMS
MC14049UB/D
MARKING
See Note 1.
See Note 1.
AWLYYWW
MC14049U
AWLYWW
16
AWLYWW
Shipping
2000/Box
2400/Box
1
14049U
96/Rail
ALYW
049U
14

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MC14049UB Summary of contents

Page 1

... MC14049UB Hex Buffers The MC14049UB hex inverter/buffer is constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. This complementary MOS device finds primary use where low power dissipation and/or high noise immunity is desired. This device provides logic–level conversion using only one supply voltage The input– ...

Page 2

... DD SS http://onsemi.com 2 CIRCUIT SCHEMATIC (1/6 OF CIRCUIT SHOWN MC14049UB V SS Î Î Î Î Î Î Î Î 125 _ C Î Î Î Î Î Î Î Î Î Î Î Î ...

Page 3

... The formulas given are for the typical characteristics only Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance Figure 1. Typical Voltage Transfer Characteristics versus Temperature MC14049UB = pF Î Î Î Î Î ...

Page 4

... PDIP 500 400 300 (D) SOIC 200 100 100 125 T , AMBIENT TEMPERATURE ( C) A Figure 4. Ambient Temperature Power Derating MC14049UB 160 120 5.0 Vdc GS 0 – DRAIN–TO–SOURCE VOLTAGE (Vdc) DS Figure 3. Typical Output Sink Characteristics PULSE GENERATOR ...

Page 5

... G K –T– SEATING PLANE 0.25 (0.010 MC14049UB PACKAGE DIMENSIONS PDIP–16 P SUFFIX PLASTIC DIP PACKAGE CASE 648–08 ISSUE R L SEATING –T– PLANE SOIC–16 D SUFFIX PLASTIC SOIC PACKAGE CASE 751B– ...

Page 6

... L PIN 1 IDENT. 1 0.15 (0.006 –V– C 0.10 (0.004) –T– SEATING D G PLANE MC14049UB PACKAGE DIMENSIONS TSSOP–16 DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948F–01 ISSUE Ç Ç Ç É É É Ç Ç Ç ...

Page 7

... PLASTIC EIAJ SOIC PACKAGE VIEW 0.10 (0.004) 0.13 (0.005) M MC14049UB PACKAGE DIMENSIONS SOEIAJ–16 F SUFFIX CASE 966–01 ISSUE O NOTES DETAIL P c http://onsemi.com 7 DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. ...

Page 8

... Email: ONlit–asia@hibbertco.com JAPAN: ON Semiconductor, Japan Customer Focus Center 4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–8549 Phone: 81–3–5740–2745 Email: r14525@onsemi.com ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative. http://onsemi.com 8 MC14049UB/D ...

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