PBL386151 Ericsson, PBL386151 Datasheet - Page 15

• Manufacturer Part Number: PBL386151
• Description: Subscriber Line Interface Circuit
• Manufacturer: Ericsson

through the loop including sense resistor
R
more negative than input DR. This chang-
es the output on the DET pin to logic level
low, i.e. tripped detector condition. The
system controller (or line card processor)
responds by de-energizing the ring relay
via the SLIC, i.e. ring trip.
nent at terminals DT and DR is not neces-
sary. A toggling DET output can be exam-
ined by a software routine to determine the
duty cycle. Off-hook condition is indicated
when the DET output is at logic level low for
more than half the time.
Figure 15. Single-channel subscriber line interface with PBL 386 15/1 and combination CODEC/filter
RT
Complete filtering of the 20 Hz ac compo-
RESISTORS (values according to IEC-
63 E96 series):
R
R
R
R
R
R
R
R
R
R
R
R
R
R
LD
LC
REF
T
TX
B
RX
1
2
3
4
RT
RF
F1
and will cause the input DT to become
+12 V /+5V
, R
RING
TIP
F2
VB2
VB
= 49.9 k
= 18.7 k
= 15 k
= 105 k
= 32.4 k
= 57.6 k
= 105 k
= 604 k
= 604 k
= 249 k
= 280 k
= 332
= 332
= Line resistor, 40
KR
E
RG
R
RF
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
5% 2 W
5% 2 W
R
R
R
RT
F1
F2
1
1
1
1
1
1
1
1
1
1
1
D
/
/
/
/
/
/
/
/
/
/
/
10
10
10
10
10
10
10
10
10
10
10
BB
W
W
W
W
W
W
W
W
W
W
W
1% match
C
OVP
GG
R
R
1
2
VB
detector output driver designed as open
collector (npn) with a current sinking capa-
bility of min 3 mA, and a 10 k
resistor. The emitter of the drive transistor
is connected to AGND. A LED can be
connected in series with a resistor ( 1 k )
at the DET output to visualize, for example
loop status.
CAPACITORS: (values according to
IEC-63 E6 series):
C
C
C
C
C
C
C
C
C
C
C
C
*100V if VEE pin connected to VBAT, VBAT2
B
B2
VCC
VEE
TC
RC
HP
LP
GG
1
2
SPR
Detector Output (DET)
The PBL 386 15/1 SLIC incorporates a
C
C
B2
B
C
1
C
C
RC
TC
R
= 100 nF
= 150 nF
= 100 nF
= 100 nF
= 1.0 nF
= 1.0 nF
= 68 nF
= 470 nF
= 220 nF
= 330 nF
= 330 nF
= optional
3
R
4
C
C
LP
HP
C
2
100 V 20%
100 V 20%
100 V 20%
100 V 20%
100 V 20%
100 V 20%
100 V 20%
63 V 10%
63 V 10%
PBL 386 15/1
RRLY
HP
RINGX
BGND
TIPX
VBAT
VBAT2
NC
PSG
DR
NC
10 V 20%
10 V* 20%
10 V 20%
TS
LP
DT
AGND
RSN
DET
VCC
SPR
REF
VEE
pull-up
VTX
PLD
PLC
C1
C2
C3
NC
VBAT<VEE<-5 V
VCC
VEE
C
R
R
R
DIODES:
D
D
D
OVP:
Secondary protection ( e g Power
Innovations TISP PBL2). The ground termin-
als of the secondary protection should be
connected to the common ground on the
Printed Board Assembly with a track as short
and wide as possible, preferably a
groundplane.
ring relay driver designed as open collector
(npn) with a current sinking capability of 50
mA.The emitter of the drive transistor is
connected to BGND. The relay driver has
an internal zener diode clamp to protect the
SLIC from inductive kick-back voltages. No
external clamp is needed.
LD
LC
SPR
REF
B
B2
BB
Relay driver
The PBL 386 15/1 SLIC incorporates a
+5 V
R
T
R
R
RX
TX
SYSTEM CONTROL
= 1N4448
= 1N4448
= 1N4448
INTERFACE
C
C
VCC
VEE
R
B
PBL 386 15/1
VCC
VEE
-
+
out
CODEC/
Filter
out
15