PBL38650-2 Ericsson, PBL38650-2 Datasheet

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PBL38650-2

Manufacturer Part Number
PBL38650-2
Description
Subscriber Line Interface Circuit
Manufacturer
Ericsson
Datasheet
Figure 1. Block diagram.
Description
The PBL 386 50/2 Subscriber Line Interface Circuit (SLIC) is a 90 V bipolar integrated
circuit for use in Central Office Metering applications and other telecommunications
equipment. The PBL 386 50/2 has been optimized for low total line interface cost and
a high degree of flexibility in different applications.
and 2x900 , with short loop current limiting adjustable to max 45 mA. In the current
limited region the loop feed is nearly constant current with a slight slope
corresponding to 2x30k .
loop power dissipation. The SLIC automatically switches between the two battery
supply voltages without need for external components or external control.
The PBL 386 50/2 is compatible with both loop and ground start signaling.
accomplished by the SLIC in conjunction with either a conventional CODEC/filter or
with a programmable CODEC/filter, e.g. SLAC, SiCoFi, Combo II. The programmable
two-wire impedance, complex or real, is set by a simple external network.
longitudinal balance specifications meet Bellcore TR909 requirements.
The PBL 386 50/2 emulates resistive loop feed, programmable between 2x50
A second, lower battery voltage may be connected to the device to reduce short
The SLIC incorporates loop current, ground key and ring trip detection functions.
Two- to four-wire and four- to two-wire voice frequency (VF) signal conversion is
Longitudinal voltages are suppressed by a feedback loop in the SLIC and the
The PBL 386 50/2 package options are 24-pin SSOP, 24-pin SOIC or 28-pin PLCC.
RINGX
VBAT2
AGND
BGND
VBAT
TIPX
VCC
DR
HP
DT
Two-wire
Interface
Transmission
Suppression
Comparator
Longitudinal
Ground Key
VF Signal
Line Feed
Controller
Ring Trip
Off-hook
Detector
Detector
Signal
and
PTG
Ring Relay
Decoder
Control
Driver
Input
and
C1
DET
POV
PSG
PLC
LP
PLD
REF
VTX
RSN
C2
C3
RRLY
Interface Circuit
Subscriber Line
Key Features
• 24-pin SSOP package
• Programmable two-wire signal
• High and low battery with automatic
• Only +5 V feed in addition to battery
• Selectable transmit gain (0.5x or 0.25x)
• 70 mW on-hook power dissipation in
• On-hook transmission
• Long loop battery feed tracks Vbat for
• No power-up sequence
• 43V open loop voltage @
• Constant loop voltage for line leakage
• Full longitudinal current capability
• Analog over temperature protection
• Line voltage measurement
• Polarity reversal
• Ground key detector
• Tip open state with ring ground
headroom for 2.2 V
switching
active state
maximum line voltage
-48V battery feed
<5 mA (RLeak ~ >10 k @ -48V)
during on-hook state
permits transmission while the
protection circuit is active
detector
PBL 386 50/2
24-pin SOIC, 24-pin SSOP, 28-pin PLCC
rms
metering
June 1999
1

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PBL38650-2 Summary of contents

Page 1

Description The PBL 386 50/2 Subscriber Line Interface Circuit (SLIC bipolar integrated circuit for use in Central Office Metering applications and other telecommunications equipment. The PBL 386 50/2 has been optimized for low total line interface ...

Page 2

PBL 386 50/2 Maximum Ratings Parameter Temperature, Humidity Storage temperature range Operating temperature range Operating junction temperature range, Note 1 Power supply -70 C Amb V with respect to A/BGND CC V with respect to A/BGND Bat2 ...

Page 3

Electrical Characteristics +70 C, PTG = Open (see pin description), R Amb = 27 mA 600 , unless otherwise specified. Current definition: current is ...

Page 4

PBL 386 50/2 Parameter Four-wire to longitudinal balance, B FLE Two-wire return loss, r TIPX idle voltage RINGX idle voltage Four-wire transmit port (VTX) Overhead voltage > 18mA TXO L On-hook, ...

Page 5

Parameter Four-wire to two-wire, g 4-2 Four-wire to four-wire, g 4-4 Insertion loss Two-wire to four-wire, G 2-4 Four-wire to two-wire, G 4-2 Gain tracking Two-wire to four-wire Four-wire to two-wire Noise Idle channel noise at two-wire (TIPX-RINGX) or four-wire ...

Page 6

PBL 386 50/2 Parameter Tip voltage (ground start) Tip voltage (ground start) Open circuit state loop current, I LOC Loop current detector Programmable threshold LTh active, active reverse Tip open state Ground key detector Ground key detector threshold ...

Page 7

Figure 7. Tipx voltage. Notes 1. The overhead voltage can be adjusted with the R for higher levels e.g. min 3.1 V Peak two-wire port with the signal source at the four-wire receive port. 2. The two-wire impedance is programmable ...

Page 8

PBL 386 50/2 PTG 1 RRLY RINGX 4 24-pin SOIC BGND 5 and TIPX 6 24-pin SSOP VBAT 7 VBAT2 8 PSG Figure 8. Pin configuration, 24-pin SSOP, 24-pin SOIC ...

Page 9

C3 } C1, C2 and C3 are digital inputs (internal pull-up) controlling the SLIC operating states Refer to section "Operating states" for details DET Detector output. Active low when indicating loop detection and ring ...

Page 10

... RSN to metallic loop current gain = 200. Note that the SLICs two-wire to four- wire gain user programmable 2-4S between two fix values. Refer to the datasheets for values 2-4S Two-Wire Impedance To calculate Z , the impedance TR presented to the two-wire line by the ...

Page 11

... If calculation of the Z formula above B yields a balance network containing an inductor, an alternate method is recom- mended. Contact Ericsson Microelectron- ics for assistance. The PBL 386 50/2 SLIC may also be used together with programmable CODEC/filters. The programmable CODEC/filter allows for system controller adjustment of hybrid balance to accom- modate different line impedances without change of hardware ...

Page 12

... VB2 BB VB2 Metering applications , is For designs with metering applications please contact Ericsson Microelectronics for assistance. CODEC Receive Interface The PBL 386 50/2 SLIC have got a completely new receive interface at the four wire side which makes it possible to reduce the number of capacitors in the applications and to fit both single and dual battery feed CODECs ...

Page 13

V on-hook resistor Peak R is connected between the POV pin OV and AGND, the overhead voltage can be set to higher values, typical values can be seen in figure 11. The R and OV ...

Page 14

PBL 386 50 Bat 0V LProg · feedB (typ 4·10 ...

Page 15

Figure 12 gives an example of a ring trip detection network. This network is applicable, when the ring voltage is superimposed on V and is injected on B ...

Page 16

... No license is granted by implication or otherwise under any patent or patent rights of Ericsson Microelectronics. These products are sold only according to Ericsson Microelectronics' general conditions of sale, unless otherwise confirmed in writing. Specifications subject to change without notice ...

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