TA2024C Tripath Technology Inc., TA2024C Datasheet
TA2024C
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TA2024C Summary of contents
Page 1
... Class-AB and the power efficiency of Class-D amplifiers. The TA2024C has incorporated specific changes to improve the click and pop performance over previous devices such as TA2024 and TA2024B. The TA2024C is recommended for all new designs that previously used the TA2024 or TA2024B. ...
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... (Note 1) (Note 4) MIN. 8.5 3.5 PARAMETER Value UNITS 16 V 6.0 V -0.3 to 6.0 V -0.3 to V5+0.3 V -40 to 150 150 qC TYP. MAX. UNITS 12 14 VALUE UNITS 2 C/W TA2024C –KL/1.0/01.06 ...
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... VDD = 9V to 13.2V 65 Vripple = 100mVrms, f=1kHz P = 10W/Channel OUT L No Load, MUTE = Logic Low 3.5 A-Weighted, input AC grounded TYP. MAX. UNITS TBD mA 0. 0.03 % 0.10 0 150 100 PV TA2024C –KL/1.0/01.06 ...
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... A logic high output indicates thermal overload output is shorted to ground, or another output. 20, 35 PGND2, PGND1 Power Grounds (high current) 22 DGND Digital Ground. Connect to AGND locally (near the TA2024C). 24, 27; OUTP2 & OUTM2; Bridged output pairs 31, 28 OUTP1 & OUTM1 25, 26, VDD2, VDD2 Supply pins for high current H-bridges, nominally 12VDC ...
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... PGND1 180uF, 16V 25 VDD2 26 VDD2 0.1uF 20 180uF, 16V PGND2 = 0.22PF for 8 Ohm loads 0.22uF 0.47uF 0.01uF * 10:1/2W 0.47uF 0.22uF 0.47uF C DO 0.01uF *8: 10:1/2W 0.47uF VDD (+12V) SW TA2024C –KL/1.0/01.06 ...
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... A C Charge pump input capacitor. This capacitor should be connected directly between D pins 2 (DCAP2) and 3 (DCAP1) and located physically close to the TA2024C. C Charge pump output capacitor that enables efficient high side gate drive for the P internal H-bridges. To maximize performance, this capacitor should be connected directly between pin 36 (CPUMP) and pin 33 (VDDA) ...
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... 10k 20k Frequency Response and C = .22uF for 100 200 500 1k 2k Frequency (Hz) Noise Floor 50 100 200 500 1k 2k Frequency (W) TA2024C –KL/1.0/01. 10k 20k 5k 10k 20k ...
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... VDD = 12V - - 22Hz - 22kHz L6, L7, L8 DS86 Inductors -30 -40 -50 -60 -70 -80 -90 -100 10k 20k Channel Separation versus Frequency 100 200 500 1k 2k Frequency (Hz) TA2024C –KL/1.0/01.06 5k 10k 20k ...
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... Both C2 and C3 may decouple VDD1 to a ground plane, but it is critical that the return path to the PGND1 pin of the TA2024C, whether ground plane or a trace short and direct low impedance path. Effectively decoupling VDD will shunt any power supply trace length inductance. ...
Page 10
... But as with the previous devices, many complaints about turn on and off clicks were not actually caused by the TA2024C. As noted above, a typical cause of turn off pop is related to the audio processor that provides the audio input to the TA2024C amplifier. The audio processor used for most LCD TV’ ...
Page 11
... Thus not possible for such a circuit to eliminate a mute off pop caused by DC offset. The servo is effective for eliminating mute on pops, since the DC offset would be nulled to zero by the time the TA2024C is muted servo, in conjunction, with a relay is an effective method for completely eliminating mute off and mute on pops, but due to the small residual pop caused by the TA2024C offset unlikely that such a sophisticated scheme would be implemented for high-volume production designs ...
Page 12
... In cases where manually trimming potentiometers is not possible, resistors can be used in place of potentiometers. Since each TA2024C has different offset voltage, the output offset voltage will need to be measured for both channel 1 and channel 2 and then resistors will have to be added on the PC board to trim the offset. Below is a lookup table for resistor values for corresponding offset voltages ...
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... Please contact Tripath sales for additional information on the DC servo circuit The TA2024C is guarded against over-temperature and over-current conditions. When the device goes into an over-temperature or over-current state, the FAULT pin goes to a logic HIGH state indicating a fault condition ...
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... P DISS T JA where… maximum power dissipation DISS T = maximum junction temperature of TA2024C JMAX T = operating ambient temperature A = junction-to-ambient thermal resistance ...
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... Copper Area (square inches) In the above graph, Copper Area is the size of the copper pad on the PC board to which the heat slug of the TA2024C is soldered. The heat slug must be soldered to the PC Board to increase the maximum power dissipation capability of the TA2024C package. Soldering will minimize the likelihood of an over-temperature fault occurring during continuous heavy load conditions. The vias used for connecting the heatslug to the copper area on the PCB should be 0.013” ...
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... The package for the TA2024C is a 36-Lead Power Small Outline Package (PSOP), similar to JEDEC outline MO-166, variation AE. Tripath currently has two suppliers for this package. We recommend that the exposed copper heatslug width for the PCB design be at least 7.3mm wide to accommodate the heatslug width variation for each package ...
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... MAX DIM MIN MAX 3.600 E1 11.00 BSC - E2 - 3.300 E3 6.300 0.152 E4 2.700 E5 - 13.000 L 0.800 1.100 L1 1.60 REF 1.000 L2 0.350 BSC All DIM measured in mm 2.900 7.300 2.900 1.000 1.100 TA2024C –KL/1.0/01.06 ...
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... Orchard Parkway, San Jose, CA 95131 408.750.3000 - P 408.750.3001 - F For more Sales Information, please visit us @ For more Technical Information, please visit www.tripath.com/cont_s.htm www.tripath.com/data.htm TA2024C –KL/1.0/01.06 ...