25C320 MicrochipTechnology, 25C320 Datasheet

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25C320

Manufacturer Part Number
25C320
Description
32K5.0VSPIBusSerialEEPROM
Manufacturer
MicrochipTechnology
Datasheet

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FEATURES
• SPI modes 0,0 and 1,1
• 3.0 MHz Clock Rate
• Single 5V Supply
• Low Power CMOS Technology
• 4096 x 8 Organization
• 32 Byte Page
• Sequential Read
• Self-timed ERASE and WRITE Cycles
• Block Write Protection
• Built-in Write Protection
• High Reliability
• 8-pin PDIP/SOIC, 14-pin TSSOP
• Temperature ranges supported
DESCRIPTION
The Microchip Technology Inc. 25C320 is a 32K-bit
serial Electrically Erasable PROM (EEPROM). The
memory is accessed via a simple Serial Peripheral
Interface (SPI) compatible serial bus. The bus signals
required are a clock input (SCK) plus separate data in
(SI) and data out (SO) lines. Access to the device is
controlled through a chip select (CS) input, allowing any
number of devices to share the same bus.
There are two other inputs that provide the end user
with additional flexibility. Communication to the device
can be paused via the hold pin (HOLD). While the
device is paused, transitions on its inputs will be
ignored, with the exception of chip select, allowing the
host to service higher priority interrupts. Also write
operations to the Status Register can be disabled via
the write protect pin (WP).
SPI is a trademark of Motorola.
1996 Microchip Technology Inc.
- Max Write Current: 5 mA
- Read Current: 1.0 mA at 5.5V, 3MHz
- Standby Current: 1 A typical
- Protect none, 1/4, 1/2, or all of Array
- Power On/Off Data Protection Circuitry
- Write Enable Latch
- Write Protect Pin
- Endurance: 1M cycles (guaranteed)
- Data Retention: >200 years
- ESD protection: >4000V
- Commercial (C):
- Industrial (I):
- Automotive (E):
32K 5.0V SPI Bus Serial EEPROM
-40 C to
-40 C to +125 C
0 C to
This document was created with FrameMaker 4 0 4
+70 C
+85 C
Preliminary
PACKAGE TYPES
BLOCK DIAGRAM
HOLD
DIP/SOIC
SCK
TSSOP
WP
SO
CS
SI
CS
SO
NC
NC
NC
WP
V
SS
I/O Control
Register
1
2
3
4
5
6
7
Status
Logic
V
WP
SO
CS
SS
Vcc
Vss
1
2
3
4
25C320
Memory
Control
Logic
8
7
6
5
Dec
X
V
HOLD
SCK
SI
DS21159B-page 1
CC
Y Decoder
Sense Amp.
R/W Control
HV Generator
Page Latches
EEPROM
14
13
12
11
10
9
8
Array
V
HOLD
NC
NC
NC
SCK
SI
CC

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25C320 Summary of contents

Page 1

... C - Automotive (E): - +125 C DESCRIPTION The Microchip Technology Inc. 25C320 is a 32K-bit serial Electrically Erasable PROM (EEPROM). The memory is accessed via a simple Serial Peripheral Interface (SPI) compatible serial bus. The bus signals required are a clock input (SCK) plus separate data in (SI) and data out (SO) lines ...

Page 2

... ELECTRICAL CHARACTERISTICS 1.1 Maximum Ratings* V ........................................................................ 7.0V CC All inputs and outputs w.r.t. V ....... -0. Storage temperature ............................ - 150 C Ambient temperature under bias.......... - 125 C Soldering temperature of leads (10 seconds) .................................................... +300 C ESD protection on all pins..................................... 4 kV *Notice: Stresses above those listed under ‘Maximum ratings’ ...

Page 3

... FIGURE 1-4: HOLD TIMING SCK SO n+2 n+1 n+2 n+1 SI HOLD 1996 Microchip Technology Inc don’t care high impedance n don’t care n Preliminary 25C320 t CSD t CLD t CSH lsb in t CSH t DIS lsb out n n n-1 DS21159B-page 3 ...

Page 4

... TABLE 1-3: AC CHARACTERISTICS Applicable over recommended operating ranges shown below unless otherwise noted 4.5V to 5.5V CC Commercial (C): Tamb = +70 C Industrial (I): Tamb = + +85C Automotive (E): Tamb = - +125 C Symbol Parameter f Clock Frequency SCK t CS Setup Time CSS t CS Hold Time CSH t CS Disable Time ...

Page 5

... BP1 BP0 The Write-In-Process (WIP) bit indicates whether the 25C320 is busy with a write operation. When set to a ‘1’ a write is in progress, when set to a ‘0’ no write is in progress. This bit is read only. 1996 Microchip Technology Inc. The Write Enable Latch (WEL) bit indicates the status of the write enable latch. When set to a ‘ ...

Page 6

... TABLE 2-2: WRITE PROTECT FUNCTIONALITY MATRIX WPEN WP WEL Low 0 1 Low 1 X High 0 X High 1 FIGURE 2-1: WRITE TO STATUS REGISTER AND/OR ARRAY FLOWCHART CS Returns High Write to Status Reg? WEL = low? No WPEN = 1? Write to Status Register Do not write to Status Register ...

Page 7

... The read operation is terminated by setting CS high (Figure 3-1). 3.3 Write Sequence Prior to any attempt to write data to the 25C320, the write enable latch must be set by issuing the WREN instruction (Figure 3-2). This is done by setting CS low and then clocking the proper instruction into the 25C320. After all eight bits of the instruction are trans- mitted, the CS must be brought high to set the write enable latch ...

Page 8

... FIGURE 3-1: READ SEQUENCE SCK instruction high impedance SO FIGURE 3-2: WRITE ENABLE SEQUENCE CS SCK SI SO FIGURE 3-3: WRITE SEQUENCE SCK instruction high impedance SO DS21159B-page ...

Page 9

... Preliminary 25C320 data byte data byte n (32 max ...

Page 10

... I/O line. 4.3 Serial Output (SO) The SO pin is used to transfer data out of the 25C320. During a read cycle, data is shifted out on this pin after the falling edge of the serial clock possible for the SI pin and the SO pin to be tied together ...

Page 11

... Product Identification System To order or to obtain information (e.g., on pricing or delivery), please use the listed part numbers, and refer to the factory or the listed sales offices. 25C320 - /P Package: Temperature Range: Device: Sales and Support Products supported by a preliminary Data Sheet may possibly have an errata sheet describing minor operational differences and recommended workarounds ...

Page 12

W ORLDWIDE AMERICAS Corporate Office Microchip Technology Inc. 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 602 786-7200 Fax: 602 786-7277 Technical Support: 602 786-7627 Web: http://www.microchip.com Atlanta Microchip Technology Inc. 500 Sugar Mill Road, Suite 200B Atlanta, GA 30350 ...

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