T35L6432A-5T Taiwan Memory Technology, Inc., T35L6432A-5T Datasheet - Page 11

no-image

T35L6432A-5T

Manufacturer Part Number
T35L6432A-5T
Description
64K x 32 SRAM
Manufacturer
Taiwan Memory Technology, Inc.
Datasheet
tm
READ TIMING
Note: 1. Q(A2) refers to output from address A2. Q (A2 + 1) refers to output from the next internal burst
Taiwan Memory Technology, Inc. reserves the right
to change products or specifications without notice.
G W , B W E ,
B W 1- B W 4
A D D R E S S
( N O T E 2 )
A D S P
A DS C
2. CE2 and CE2 have timing identical to CE . On this diagram, when CE is LOW, CE2 is LOW and
3. Timing is shown assuming that the device was not enabled before entering into this sequence.
A D V
C L K
O E
C E
Q
address following A2.
CE2 is HIGH. When CE is HIGH, CE2 is HIGH and CE2 is LOW.
does not cause Q to be driven until after the following clock rising edge.
CH
TE
t A D SS t A DS H
t CE S t CE H
t A S t A H
A 1
t
(NO TE 3)
KH
Hi g h-Z
t KC
t
t
W S
KL
S in g le RE A D
t
t KQ LZ
W H
t
KQ
t A DS S t A D SH
A 2
Q (A 1)
t OE HZ
t
A A S
t
A A H
t O EQ
t OEL Z
(NOT E1)
Q (A 2)
t KQ X
t KQ
P. 11
Q(A 2+1)
AD V s usp e nd s bu rs t.
Q (A 2+2)
BUR S T RE A D
Q(A2 + 3 )
Publication Date: DEC. 1998
A 3
Q(A2)
Bur st con tin ue d wi th
n ew b ase ad d re ss.
Bu rst wr a ps a ro und
to i ts in ita l sta te.
T35L6432A
Q (A 2+1)
Des ele ct cy cle.
DO N' T CARE
UNDEFIN ED
Revision:A
Q(A 3)
t KQHZ
t K QX
OE

Related parts for T35L6432A-5T