T17C1 ACER, T17C1 Datasheet - Page 13

• Manufacturer Part Number: T17C1
• Description: COLOR TFT LCD MODULE
• Manufacturer: ACER

4. INTERFACE SPECIFICATIONS
4.1 THE LVDS INTERFACE SIGNAL DESCRIPTION
Note (1) Connector Part No.: FI-SE30P-HF (JAE)
Note (2) The first pixel is even.
Note (3) Input signal of even and odd clock should be the same timing.
Pin
10
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
11
1
2
3
4
5
6
7
8
9
Name
VCC
VCC
VCC
GND
GND
GND
SELLVDS
TEST
GND
RXO3+
RXO3-
RXOC+
RXOC-
RXO2+
RXO2-
RXO1+
RXO1-
RXO0+
RXO0-
RXE3+
RXE3-
RXEC+
RXEC-
RXE2+
RXE2-
RXE1+
RXE1-
RXE0+
RXE0-
GND
Description
+5.0V power supply
+5.0V power supply
+5.0V power supply
Ground
Ground
Ground
Select LVDS data order. Connect this pin to low. See the following table.
Test pin should be tied to ground.
Ground
Positive LVDS differential data input. Channel O3 (odd)
Negative LVDS differential data input. Channel O3(odd)
Positive LVDS differential clock input. (odd)
Negative LVDS differential clock input. (odd)
Positive LVDS differential data input. Channel O2 (odd)
Negative LVDS differential data input. Channel O2 (odd)
Positive LVDS differential data input. Channel O1 (odd)
Negative LVDS differential data input. Channel O1 (odd)
Positive LVDS differential data input. Channel O0 (odd)
Negative LVDS differential data input. Channel O0 (odd)
Positive LVDS differential data input. Channel E3 (even)
Negative LVDS differential data input. Channel E3 (even)
Positive LVDS differential clock input. (even)
Negative LVDS differential clock input. (even)
Positive LVDS differential data input. Channel E2 (even)
Negative LVDS differential data input. Channel E2 (even)
Positive LVDS differential data input. Channel E1 (even)
Negative LVDS differential data input. Channel E1 (even)
Positive LVDS differential data input. Channel E0 (even)
Negative LVDS differential data input. Channel E0 (even)
Ground
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Issue Date: Feb.1’2001
Model: M170E1 -01
Dcc No.: 14007038
Approval
Version 2.2