25F005 Saifun, 25F005 Datasheet
25F005
Related parts for 25F005
25F005 Summary of contents
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... Saifun Semiconductors Ltd. This Data Sheet states Saifun's current technical specifications regarding the Products described herein. This Data Sheet may be revised by subsequent versions or modifications due to changes in technical specifications. www.DataSheet4U.com SA25F005 Advanced Information 512Kb Serial Flash with 25MHz SPI Bus ...
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... The SA25F005 transfer space-saving, 8-lead narrow SOIC package The SA25F005 is part of the SPI Flash and EEPROM family designed to work with any SPI-compatible, microcontroller, and offers both hardware (WPb pin) and Software (“block protect”) data protection. For example, programming a 2-bit code into the status register prevents program with top ¼ ...
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... SPI Modes ............................................................ 14 Master ........................................................... 14 Slave ............................................................. 14 Transmitter/Receiver ..................................... 14 Serial Opcode................................................ 14 Invalid Opcode .............................................. 14 Chip Select (CSb).......................................... 14 Hold Condition............................................... 15 Write Protect ................................................. 16 SA25F005 Advanced Information www.DataSheet4U.com Functional Description ............................................... 17 Instructions............................................................ 17 Read Status Register (RDSR) ............................... 18 Write Enable (WREN) ........................................... 20 Write Disable (WRDI)............................................ 20 Write Status Register (WRSR) .............................. 21 Read Data Bytes (READ) ...................................... 23 Fast Read (FAST_READ) ...
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... List of Figures Figure 1. SA25F005 Block Diagram ................................ 5 Figure 2. SOIC 8 (150 mil)/PDIP/MLF Package (Top View) ............................................................. 6 Figure 3. SA25F005 Ordering Information....................... 7 Figure 4. SPI Mode 0 (0,0) Input Timing........................ 11 Figure 5. SPI Mode 0 (0,0) Output Timing ..................... 11 Figure 6. AC Measurements I/O Waveform................... 12 Figure 7. Supported SPI Modes .................................... 14 Figure 8. Hold Condition................................................ 15 Figure 9. SPI Serial Interface ........................................ 17 Figure 10 ...
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... Table 1 = 256 pages (256 bytes each) SRAM Logic Each page programmed, with the bits programmed from The SA25F005's memory can be erased via the Page, Sector or Bulk Erase commands, with the bits erased from Table 1. Memory Organization Sector Address Range ...
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... HOLDb SO 2 SA25F005 WPb 3 6 SCK 5 SI GND 4 Table 2. Pin Names Signal Name CSb Chip Select SCK Serial Data Clock SI Serial Data Input SO Serial Data Output GND Ground V Power Supply CC WPb Write Protect Suspend Serial Input SA25F005 Advanced Information www.DataSheet4U.com 6 SAIFUN ...
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... Ordering Information Figure 3. SA25F005 Ordering Information Package Temp. Range Voltage Operating Range Density Interface SA25F005 Advanced Information www.DataSheet4U.com SAIFUN Letter Description Blank Tube X Tape and Reel Blank Non-lead Free F Lead Free N 8-pin DIP M8 8-pin SOIC (150 mil) ...
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... Latch Up Operating Conditions Operating Temperature: SA25F005 SA25F005E Positive Power Supply: SA25F005 - +150 C 4 -0.3 V +235 C 2000 V min. Minimum 4 KV Minimum 500 V Minimum 1 KV 100 mA on all pins +125 + + 3.6 V SA25F005 Advanced Information www.DataSheet4U.com 8 SAIFUN ...
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... CSb = V CC CSb = V CC CSb = 3 CSb = GND GND -0 1 SA25F005 Advanced Information www.DataSheet4U.com SAIFUN = 2.7-3 Limits Unit Typ* Max ...
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... Value guaranteed by characterization, not 100% tested in production Table 4. AC Test Conditions 25 MHz Min Typ D.C. 0.1 0 100 100 0.3 0.5 100K SA25F005 Advanced Information www.DataSheet4U.com 10 SAIFUN Unit Max 25 MHz V/ns V/ ...
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... CSS SCK t t SU:DAT HD:DAT SI MSB IN SO Figure 4. SPI Mode 0 (0,0) Input Timing CS SCK Figure 5. SPI Mode 0 (0,0) Output Timing t CSH t t CRT CFT LSB IN High Impedance t WH SA25F005 Advanced Information www.DataSheet4U.com 11 SAIFUN CSS DIS LSB OUT ...
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... Figure 6. AC Measurements I/O Waveform Table 5. AC Measurements Symbol Parameter C Load Capacitance L Input Rise and Fall Times Input Pulse Voltage Input and Output Timing Reference Voltages SA25F005 Advanced Information www.DataSheet4U.com Input and Output Timing Reference Levels 0.7Vcc 0.3Vcc Min Max Unit 30 pF ...
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... When this pin is held low, writes to the memory array and status register are disabled; when it is held high, they are enabled. Refer to Write Protect, page 16, for additional details. SA25F005 Advanced Information www.DataSheet4U.com SAIFUN eliminates the need the ...
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... Table 6, page 17). Invalid Opcode If an invalid opcode is received, no data is pins shifted into the SA25F005, and the serial output pin remains in a high impedance state until a CSb falling edge is detected again, which communication. ...
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... SI pin, and the SO pin remains in a high impedance state. Hold Condition The HOLDb pin is used in conjunction with the CSb pin to select the SA25F005. When the device is selected and a serial sequence is underway, HOLDb can be used to pause the serial communication with the master device without resetting the serial sequence ...
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... The WPb pin function is blocked when the WPBEN bit in the status register is 0, which enables the user to install the SA25F005 in a system with the WPb pin tied to ground but still able to write to the status register. All WPb pin functions are enabled when the WPBEN bit is set to 1. ...
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... DATA IN SERIAL CLOCK SSO SS1 SS2 SS3 Figure 9. SPI Serial Interface The SA25F005's SPI consists of an 8-bit instruction register that decodes a specific instruction to different instructions (called opcodes) are incorporated in the device for various operations. Table 6 lists the instruction set and the format for proper operation. All ...
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... The Bit 0 (/RDY) indicates the Busy/Ready status of the device. This bit is a read-only bit and is read by executing an RDSR instruction. If this bit is 1, the device is busy doing a Program or Erase cycle the device is ready. SA25F005 Advanced Information www.DataSheet4U.com 18 SAIFUN ...
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... SO pins, with the D7 bit first and the D0 bit last, as shown in Figure 10 Status Register Out MSB MSB SA25F005 Advanced Information www.DataSheet4U.com SAIFUN Status Register Out MSB 19 ...
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... WP pin's status. The WREN instruction should be executed after the WRDI instruction to re-enable all programming modes. The instruction sequence is shown in Figure 12, with SO in high impedance Instruction Instruction SA25F005 Advanced Information www.DataSheet4U.com 20 SAIFUN modes. The WRDI 7 7 ...
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... Write Status Register (WRSR) The WRSR instruction enables the user to select one of four levels of protection. The SA25F005 is divided into four array segments. The top quarter, top half or all of the memory segments can be protected (for more details, refer to Table 9). The data within a selected segment is therefore read-only ...
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... Figure 13. Write Status Register (WRSR) Instruction Sequence the 2. The WRSR transmitted on the SI pin, followed by the data to be programmed. The instruction sequence is shown in Figure 13 Instruction Status Register MSB SA25F005 Advanced Information www.DataSheet4U.com SAIFUN opcode is then ...
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... SCK progress 24-Bit Address MSB SA25F005 Advanced Information www.DataSheet4U.com SAIFUN READ sequence can be as the byte address is incremented and data DATA OUT 1 DATA OUT ...
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... Dummy Byte Address SA25F005 Advanced Information www.DataSheet4U.com SAIFUN . SCK READ sequence can as the byte address incremented and data CSb high terminates the DATA OUT 1 ...
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... If more than 256 bytes of data are transmitted, the address counter rolls over and the previously written data is overwritten. The SA25F005 is automatically returned to the write disable state at the completion of a Write cycle. NOTES the device is not write enabled, ...
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... MSB MSB Data Byte MSB MSB SA25F005 Advanced Information www.DataSheet4U.com SAIFUN Data Byte Data Byte 256 ...
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... The /RDY bit is 1 during the self-timed PE cycle, and 0 when it is completed. The WEN bit is reset at some unspecified time before the instruction sequence is shown in Figure 18. The SA25F005 is automatically returned to the Write Disable state at the completion cycle. NOTES the device is not write enabled, the ...
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... SE cycle, and 0 when it is completed. The WEN bit is reset at some unspecified time before the cycle is completed. The instruction sequence is shown in Figure 20. The SA25F005 is automatically returned to the write disable state at the completion cycle. NOTES the device is not write enabled, ...
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... The /RDY bit is 1 during the self-timed BE cycle, and 0 when it is completed. The WEN bit is reset at some unspecified time before the instruction sequence is shown in Figure 22. The SA25F005 is automatically returned to the Write Disable state at the completion cycle. NOTES the device is not write enabled, the ...
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... The DP instruction is included in the device in order to be compatible with other SPI Flash devices, and is identical to the SP instruction. The SA25F005's low standby current of 1 µA is the same in both DP and Standby modes recommended that the standard Standby mode be used for the lowest power current draw, as well as an extra SP mechanism while the device is not in active use ...
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... Table 4 on page 10. Once in Standby mode, the device waits to be selected, so that it can receive, decode and execute instructions Instruction Software Protect Mode SA25F005 Advanced Information www.DataSheet4U.com SAIFUN , and CSb must remain high RES (max), as specified in RES t RES Standby Mode 31 ...
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... Erase, Program or Write Status Register cycle is in progress is not decoded, and has no effect on the cycle in progress. This instruction serves a second purpose as well. The device features an 8-bit Electronic Signature, whose value for the SA25F005 is 05h. This can be read using the RES instruction ...
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... Write, Program or Erase cycle is in progress, data corruption can result.) is less CC ), all POR Symbol POR Threshold V POR reaches the . CC SA25F005 Advanced Information www.DataSheet4U.com SAIFUN rail decoupled by a suitable at powerdown from the POR Table 11. Powerup Parameter Min. Max . Unit 2.2 V 2.4 ...
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... Physical Dimensions All measurements are in inches (millimeters), unless otherwise specified. Figure 29. 8-pin SOIC Package SA25F005 Advanced Information www.DataSheet4U.com 34 SAIFUN ...
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... Figure 30. 8-pin MLF Leadless Package SA25F005 Advanced Information www.DataSheet4U.com 35 SAIFUN ...
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... Figure 31. Molded Dual-in-line Package (N) Package Number N08E SA25F005 Advanced Information www.DataSheet4U.com 36 SAIFUN ...
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... SA25F005 Advanced Information www.DataSheet4U.com United States Saifun Semiconductors Inc. 2350 Mission College Blvd. Suite 1070 Santa Clara, CA 95054 U ...