IDT72V8985 Integrated Device Technology, IDT72V8985 Datasheet - Page 4

• Manufacturer Part Number: IDT72V8985
• Description: 3.3 Volt Time Slot Interchange Digital Switch 256 X 256
• Manufacturer: Integrated Device Technology

serial-to-parallel converters and stored sequentially in a 256-position Data
Memory. By using an internal counter that is reset by the input 8 KHz frame pulse,
F0i, the incoming serial data streams can be framed and sequentially addressed.
can be programmed to perform time slot interchange functions with different
throughput delay capabilities on a per-channel basis. The Variable Delay
mode, most commonly used for voice applications, can be selected ensuring
minimum throughput delay between input and output data. In Constant Delay
mode, used in multiple or grouped channel data applications, the integrity of the
information through the switch is maintained.
CONNECTION MEMORY
Memory or Connection Memory. The Connection Memory is split into HIGH
and LOW parts and is associated with particular TX output streams. In Processor
Mode, data output on the TX streams is taken from the Connection Memory Low
and originates from the microprocessor (Figure 2). Where as in Connection
Mode (Figure 1), data is read from Data Memory and originated from the
incoming RX streams. Data destined for a particular channel on the serial output
stream is read internally during the previous channel time slot to allow time for
memory access and internal parallel-to-serial conversion.
CONNECTION MODE
are stored in the Connection Memory Low. The Connection Memory Low
locations are mapped to corresponding 8-bit x 32-channel output. The contents
of the Data Memory at the selected address are then transferred to the parallel-
to-serial converters before being output. By having the output channel to specify
the input channel through the Connection Memory, input channels can be
broadcast to several output channels.
PROCESSOR MODE
locations which correspond to the output link and channel number. The contents
of the Connection Memory Low are transferred to the parallel-to-serial
converter one channel before it is to be output and are transmitted each frame
to the output until it is changed by the CPU.
CONTROL
functions available in the IDT72V8985. Output channels are selected into
specific modes such as: Processor Mode or Connection mode, Variable or
Constant throughput delay modes, Output Drivers Enabled or in three-state
condition. There is also one bit to control the state of the CCO output pin.
RX
FUNCTIONAL DESCRIPTION (Cont'd)
IDT72V8985 3.3V Time Slot Interchange
Digital Switch 256 x 256
The received serial data is internally converted to parallel by the on chip
Depending on the type of information to be switched, the IDT72V8985 device
Data to be output on the serial streams may come from two sources: Data
In Connection Mode, the addresses of input source for all output channels
In Processor Mode the CPU writes data to the Connection Memory Low
The Connection Memory High bits (Table 4) control the per-channel
Serial Data
Receive
Streams
Figure 1. Connection Mode
Connection
Memory
Memory
Data
Serial Data
Transmit
Streams
5707 drw05
TX
4
OUTPUT DRIVE ENABLE (ODE)
is held LOW all TDM (Time Division Multiplexed) outputs will be placed in high
impedance regardless Connection Memory High programming. However, if
ODE is HIGH, the contents of Connection Memory High control the output state
on a per-channel basis.
SERIAL INTERFACE TIMING
link configuration at 2.048 Mb/s to be implemented. The IDT72V8985 can
automatically detect the presence of an input frame pulse, identify the type of
backplane present on the serial interface, and format the synchronization pulse
according to ST-BUS
active LOW in ST-BUS
to the serial port, the internal timing unit establishes the appropriate serial data
bit transmit and sampling edges. In ST-BUS
of the 4.096 MHz clock marks a boundary and the input data is clocked in by
the rising edge, three quarters of the way into the bit cell. In GCI mode every
second rising edge of the 4.096 MHz clock marks the bit boundary while data
sampling is performed during the falling edge, at three quarters of the bit
boundaries.
DELAY THROUGH THE IDT72V8985
streams results in a delay through the device. The delay through the
IDT72V8985 device varies according to the mode selected in the V/C bit of the
Connection Memory High.
VARIABLE DELAY MODE
of source and destination on the input and output streams. The minimum delay
achievable in the IDT72V8985 device is three time slots. In the IDT72V8985
device, the information that is to be output in the same channel position as the
information is input (position n), relative to frame pulse, will be output in the
following frame (channel n, frame n+1). The same occurs if the input channels
succeeding (n+1, n+2) the channel position as the information is input.
device (for instance, input channel 0 to output channel 3 or input channel 30 to
output channel 1), is always output three channels later.
input and output channels, will have a throughput delay equal to the difference
between the output and input channels; i.e., the throughput delay will be less
than one frame. Table 1 shows the possible delays for the IDT72V8985 device
in Variable Delay Mode. An example is shown in Figure 3.
CONSTANT DELAY MODE
The ODE pin is the master output three-state control pin. If the ODE input
The IDT72V8985 master clock (C4i) is 4.096 MHz signal allowing serial data
The transfer of information from the input serial streams to the output serial
The delay in Variable Delay Mode is dependent only on the combination
The information switched to the third time slot after the input has entered the
Any switching configuration that provides three or more time slots between
In this mode frame integrity is maintained in all switching configurations by
Serial Data
Receive
Streams
®
or GCI interface specifications (active HIGH in GCI or
®
Figure 2. Processor Mode
). Upon determining the correct interface Connected
Microprocessor
Connection
Memory
Memory
Data
Commercial Temperature Range
®
mode, every second falling edge
Serial Data
Transmit
Streams
5707 drw06
TX