AAT4252AITP-3-T1 AnalogicTech, AAT4252AITP-3-T1 Datasheet - Page 11

• Manufacturer Part Number: AAT4252AITP-3-T1
• Description: Dual Slew Rate Controlled Load Switch
• Manufacturer: AnalogicTech

SmartSwitch
The load current is 100mA for 87.5% of the 4.61ms
period and 2A for 12.5% of the period. Since the
Electrical Characteristics do not report R
operation, it must be approximated by consulting the
chart of R
and 2A can be scaled by the ratio seen in the chart to
derive the R
= 160.3mΩ. De-rated for temperature: 160.3mΩ · (1 +
0.002800 · (125°C -25°C)) = 205mΩ. The power dissi-
pation for a 100mA load is calculated as follows:
P
P
P
P
P
P
The power dissipation for 100mA load at 87.5% duty
cycle is 1.97mW. Now the power dissipation for the
remaining 12.5% of the duty cycle at 2A is calculated:
P
P
P
P
P
P
The power dissipation for 2A load at 12.5% duty cycle is
102.6mW. Finally, the two power figures are summed to
determine the total true power dissipation under the
varied load.
4252A.2009.06.1.1
D(MAX)
D(100mA)
D(100mA)
D(87.5%D/C)
D(87.5%D/C)
D(87.5%D/C)
D(MAX)
D(2A)
D(2A)
D(12.5%D/C)
D(12.5%D/C)
D(12.5%D/C)
= (2A)
= 820.97mW
= I
= I
Figure 1: AAT4252A Evaluation Board
= (100mA)
= 2.05mW
DS(ON)
OUT
OUT
= %DC · P
= 0.875 · 2.05mW
= 1.8mW
= %DC · P
= 0.125 · 820.97mW
= 102.6mW
DS
2
2
2
· R
· R
· 205mΩ
for 4V V
vs. V
DS
DS
TM
Top Side Layout.
2
IN
· 205mΩ
D(100mA)
D(2A)
. The R
IN
at 25°C : 155mΩ · 90mΩ/87mΩ
DS
reported for 5V at 100mA
DS(MAX)
w w w . a n a l o g i c t e c h . c o m
for 4V
P
P
P
The maximum power dissipation for the AAT4252A oper-
ating at an ambient temperature of 85°C is 250mW. The
device in this example will have a total power dissipation
of 104.4mW. This is well within the thermal limits for safe
operation of the device; in fact, at 85°C, the AAT4252A
will handle a 2A pulse for up to 30% duty cycle. At lower
ambient temperatures, the duty cycle can be further
increased.
Printed Circuit Board
Layout Recommendations
For proper thermal management, and to take advantage
of the low R
layout rules should be followed: V
routed using wider than normal traces, and GND should
be connected to a ground plane. For best performance,
C
Evaluation Board Layout
The AAT4252A evaluation layout follows the printed cir-
cuit board layout recommendations and can be used for
good applications layout. Refer to Figures 1 and 2.
Note: Board layout shown is not to scale.
D(total)
D(total)
D(total)
IN
Dual Slew Rate Controlled Load Switch
and C
= P
= 1.8mW + 102.6mW
= 104.4mW
OUT
Figure 2: AAT4252A Evaluation Board
D(100mA)
should be placed close to the package pins.
DS(ON)
+ P
of the AAT4252A, a few circuit board
Bottom Side Layout.
D(2A)
PRODUCT DATASHEET
AAT4252A
IN
and V
OUT
should be
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