SI591 Silicon Laboratories, SI591 Datasheet

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SI591

Manufacturer Part Number
SI591
Description
(SI590 / SI591) 1 ps MAX JITTER CRYSTAL OSCILLATOR
Manufacturer
Silicon Laboratories
Datasheet

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www.DataSheet.co.kr
1 ps M
(10 M H
Features
Applications
Description
The Si590/591 XO utilizes Silicon Laboratories’ advanced DSPLL
to provide a low jitter clock at high frequencies. The Si590/591 is available
with any-rate output frequency from 10 to 525 MHz. Unlike a traditional XO,
where a unique crystal is required for each output frequency, the Si590/591
uses one fixed crystal to provide a wide range of output frequencies. This IC
based approach allows the crystal resonator to provide exceptional
frequency stability and reliability. In addition, DSPLL clock synthesis provides
superior supply noise rejection, simplifying the task of generating low jitter
clocks in noisy environments typically found in communication systems. The
Si590/591 IC based XO is factory configurable for a wide variety of user
specifications including frequency, supply voltage, output format, and
temperature stability. Specific configurations are factory programmed at time
of shipment, thereby eliminating long lead times associated with custom
oscillators.
Functional Block Diagram
Preliminary Rev. 0.25 7/09
OE
Available with any-rate output
frequencies from 10 MHz to 525 MHz
3rd generation DSPLL
jitter performance: 1 ps max jitter
Better frequency stability than SAW-
based oscillators
Internal fundamental mode crystal
ensures high reliability
SONET/SDH (OC-3/12/48)
Networking
SD/HD SDI/3G SDI video
GND
V
DD
AX
17 k *
17 k *
Z TO
*Note: Output Enable High/Low Options Available – See Ordering Information
J
Frequency
I T T E R
Fixed
®
XO
525 MH
with superior
C
Copyright © 2009 by Silicon Laboratories
10–525 MHz
Synthesis
RYSTAL
Any-rate
DSPLL
Clock
Z
Test and measurement
Storage
FPGA/ASIC clock generation
Available CMOS, LVPECL,
LVDS, and CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Pb-free/RoHS-compliant
–40 to +85 ºC operating
temperature range
)
®
CLK–
O
SC ILLA TOR
CLK+
®
circuitry
S i 5 90 / 591
Si590 (LVDS/LVPECL/CML)
(XO)
Si591 (LVDS/LVPECL/CML)
GND
GND
GND
Ordering Information:
NC
OE
OE
NC
OE
NC
Pin Assignments:
Si590 (CMOS)
See page 6.
See page 5.
1
2
3
1
2
3
1
2
3
Si5602
(Top View)
6
5
4
6
5
4
6
5
4
V
CLK–
CLK+
V
NC
CLK
V
CLK–
CLK+
Si590/591
DD
DD
DD
Datasheet pdf - http://www.DataSheet4U.net/

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SI591 Summary of contents

Page 1

... See page 5. (Top View) ® circuitry GND 3 Si590 (LVDS/LVPECL/CML CLK+ GND 3 Si590 (CMOS GND 3 Si591 (LVDS/LVPECL/CML CLK– 4 CLK CLK CLK– 4 CLK+ Si590/591 Datasheet pdf - http://www.DataSheet4U.net/ ...

Page 2

Si590/591 1. Electrical Specifications Table 1. Recommended Operating Conditions Parameter 1 Supply Voltage Supply Current 2 Output Enable (OE) Operating Temperature Range Notes: 1. Selectable parameter specified by part number. See Section 3. "Ordering Information" on page 6 for ...

Page 3

Table 3. CLK± Output Levels and Symmetry Parameter 1 LVPECL Output Option 2 LVDS Output Option 2 CML Output Option 3 CMOS Output Option Rise/Fall time (20/80%) Symmetry (duty cycle) Notes  – 2.0 V. ...

Page 4

Si590/591 Table 6. Absolute Maximum Ratings Parameter Maximum Operating Temperature Supply Voltage, 1.8 V Option Supply Voltage, 2.5/3.3 V Option Input Voltage (any input pin) Storage Temperature ESD Sensitivity (HBM, per JESD22-A114) Soldering Temperature (Pb-free profile) Soldering Temperature Time ...

Page 5

... Output enable Electrical and Case Ground Oscillator Output Complementary Output Power Supply Voltage for output enable active high k pulldown resistor to DD Table 9. Pinout for Si591 Series OE* GND CLK+ CLK– for output enable active high k pulldown resistor to DD Preliminary Rev ...

Page 6

... The Si590 and Si591 XO series are supplied in an industry-standard, RoHS compliant, 6-pad package. The Si591 Series supports an alternate OE pinout (pin #1) for LVPECL, LVDS, and CML output formats. See Tables 8 and 9 for the pinout differences between the Si590 and Si591 series ...

Page 7

Outline Diagram and Suggested Pad Layout Figure 2 illustrates the package details for the Si590/591. Table 10 lists the values for the dimensions shown in the illustration. Figure 2. Si590/591 Outline Diagram Table 10. Package Diagram Dimensions (mm) ...

Page 8

... Si590/591 5. Si590/Si591 Mark Specification Figure 3 illustrates the mark specification for the Si590/Si591. Table 11 lists the line information. Line Position 1 1–10 2 1–10 3 Trace Code Position 1 Position 2 Position 3–6 Position 7 Position 8–9 Position SiLabs 123 ...

Page 9

PCB Land Pattern Figure 4 illustrates the 6-pin PCB land pattern for the Si590/591. Table 12 lists the values for the dimensions shown in the illustration. . Dimension Notes: 1. Dimensioning and tolerancing per the ANSI Y14.5M-1994 ...

Page 10

D C OCUMENT HANGE Revision 0.2 to Revision 0.25  Total Stability Maximum changed to ±30 in Table 2 on page 2.  Total Stability Maximum changed to ±30 in Figure 1 on page 6. L IST Preliminary Rev. ...

Page 11

N : OTES Preliminary Rev. 0.25 Si590/591 11 Datasheet pdf - http://www.DataSheet4U.net/ ...

Page 12

... Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where per- sonal injury or death may occur. Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized ap- plication, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages ...

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