MC100EP33DTG ON Semiconductor, MC100EP33DTG Datasheet - Page 2

• Manufacturer Part Number: MC100EP33DTG
• Description: IC DIVIDER DIV X4 ECL CLK 8TSSOP
• Manufacturer: ON Semiconductor
• Series: 100EPr

Specifications of MC100EP33DTG

• Logic Type: Divide-by-4
• Number Of Elements: 1
• Number Of Bits Per Element: 1
• Reset: Asynchronous
• Count Rate: 4GHz
• Trigger Type: Positive, Negative
• Voltage - Supply: 3.3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Direction: -
• Timing: -
• Lead Free Status / Rohs Status: Compliant
• Other names: MC100EP33DTGOS

Figure 1. 8−Lead Pinout (Top View) and Logic Diagram
RESET
CLK
CLK
V
BB
1
2
3
4
RESET
1. For additional information, see Application Note AND8003/D.
CLK
Table 3. ATTRIBUTES
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
ESD Protection
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Flammability Rating
Transistor Count
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Q
B4
R
Characteristics
8
7
6
5
Figure 2. Timing Diagram
V
Q
Q
V
CC
EE
http://onsemi.com
Oxygen Index: 28 to 34
Charged Device Model
Human Body Model
t
RR
Machine Model
2
TSSOP−8
* Pins will default LOW when left open.
Table 2. TRUTH TABLE
Table 1. PIN DESCRIPTION
Z = LOW to HIGH Transition
Z = HIGH to LOW Transition
F = Divide by 4 Function
SOIC−8
CLK
CLK*, CLK*
Reset*
V
Q, Q
V
V
EP
X
DFN8
Z
BB
CC
EE
PIN
CLK
X
Z
91 Devices
Pb Pkg
Level 1
Level 1
Level 1
UL−94 V−0 @ 0.125 in
ECL Clock Inputs
ECL Asynchronous Reset
Reference Voltage Output
ECL Data Outputs
Positive Supply
Negative Supply
(DFN8 only) Thermal exposed pad must
be connected to a sufficient thermal con-
duit. Electrically connect to the most neg-
ative supply (GND) or leave unconnected,
floating open.
RESET
Z
L
> 200 V
> 4 kV
> 2 kV
Value
75 kW
NA
Pb−Free Pkg
FUNCTION
Level 1
Level 3
Level 1
Q
F
L
Q
H
F