TDA8366 Philips Semiconductors, TDA8366 Datasheet - Page 14

• Manufacturer Part Number: TDA8366
• Description: I2C-bus controlled PAL/NTSC TV processor
• Manufacturer: Philips Semiconductors

Philips Semiconductors
Table 12 Vertical divider mode
Table 13 Video ident mode
Table 14 Long blanking mode
Table 15 EHT tracking mode
Table 16 Enable vertical guard (RGB blanking)
Table 17 Service blanking
Table 18 Overvoltage input mode
Table 19 Vertical deflection mode
January 1995
NCIN
I
processor
HCO
LBM
EVG
PRD
SBL
EXP
VID
2
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
1
1
C-bus controlled PAL/NTSC TV
normal operation
switched to search window
not active
adapted to standard (50 or 60 Hz)
fixed in accordance with 50 Hz standard
EHT tracking only on vertical
EHT tracking on vertical and EW
not active
active
off
on
detection mode
protection mode
1
CL
loop switched on and off
0
1
0
1
SERVICE BLANKING MODE
VERTICAL DIVIDER MODE
VERTICAL GUARD MODE
normal
compress
expand
expand and lift
OVERVOLTAGE MODE
VERTICAL DEFLECTION MODE
VIDEO IDENT MODE
BLANKING MODE
TRACKING MODE
14
Table 20 Horizontal frequency during switch-on
Table 21 Condition Y/C input
Table 22 PAL/NTSC matrix
Table 23 Colour crystal PLL
Table 24 Y-delay adjustment; note 1
Note
1. For an equal delay of the luminance and chrominance
Table 25 RGB blanking
Table 26 Noise coring (peaking)
YD0 to YD3
COR
SFM
MAT
CVS
PHL
RBL
signal the delay must be set at a value of 160 ns. This
is only valid for a CVBS signal without group
delay distortions.
0
1
0
1
0
1
0
1
0
1
0
1
YD3
YD2
YD1
YD0
maximum
nominal
switched to Y/C mode
switched to CVBS mode
adapted to standard
PAL
PLL closed
oscillator free-running
not active
active
off
on
YD3
YD2
YD1
YD0
START-UP FREQUENCY
160 ns +
80 ns +
40 ns +
40 ns
RGB BLANKING
NOISE CORING
Y-INPUT MODE
MATRIX
STATE
Y-DELAY
Objective specification
TDA8366