MCP6021 Microchip Technology, MCP6021 Datasheet - Page 15

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MCP6021

Manufacturer Part Number
MCP6021
Description
Rail-to-Rail Input/Output, 10 MHz Op Amps
Manufacturer
Microchip Technology
Datasheet

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To use the internal mid-supply reference for an
inverting gain circuit, connect the V
non-inverting input, as shown in Figure 4-8. The
capacitor C
output.
FIGURE 4-8:
V
If you don’t need the mid-supply reference, leave the
V
4.7
With this family of operational amplifiers, the power
supply pin (V
bypass capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm
for good, high-frequency performance. It also needs a
bulk capacitor (i.e., 1 µF or larger) within 100 mm to
provide large, slow currents. This bulk capacitor can be
shared with nearby analog parts.
4.8
An unused op amp in a quad package (MCP6024)
should be configured as shown in Figure 4-9. These
circuits prevent the output from toggling and causing
crosstalk. Circuit A can use any reference voltage
between the supplies, provides a buffered DC voltage,
and minimizes the supply current draw of the unused
op amp. Circuit B uses the minimum number of compo-
nents and operates as a comparator; it may draw more
current.
FIGURE 4-9:
© 2006 Microchip Technology Inc.
REF
REF
V
pin open.
DD
¼ MCP6144 (A)
(MCP6021 and MCP6023 only).
V
IN
R
R
Supply Bypass
Unused Op Amps
B
DD
helps reduce power supply noise on the
R
for single supply) should have a local
V
G
DD
Inverting gain circuit using
Unused Op Amps.
R
F
V
C
REF
B
¼ MCP6144 (B)
REF
V
DD
V
pin to the
OUT
4.9
In applications where low input bias current is critical,
PCB (printed circuit board) surface-leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low humidity conditions, a typical resistance
between nearby traces is 10
cause 5 pA of current to flow, which is greater than the
MCP6021/1R/2/3/4 family’s bias current at +25°C
(1 pA, typ).
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
Figure 4-10 shows an example of this type of layout.
FIGURE 4-10:
Layout.
1.
2.
4.10
Due to their speed capabilities, a little extra care in the
PCB (Printed Circuit Board) layout can make a
significant difference in the performance of these op
amps. Good PC board layout techniques will help you
achieve the performance shown in Section 1.0 “Elec-
trical Characteristics” and Section 2.0 “Typical Per-
formance Curves”, while also helping you minimize
EMC (Electro-Magnetic Compatibility) issues.
Use a solid ground plane and connect the bypass local
capacitor(s) to this plane with minimal length traces.
This cuts down inductive and capacitive crosstalk.
Non-inverting Gain and Unity-Gain Buffer.
a)
b)
Inverting (Figure 4-10) and Transimpedance
Gain Amplifiers (convert current to voltage, such
as photo detectors).
a)
b)
MCP6021/1R/2/3/4
Guard Ring
PCB Surface Leakage
Connect the guard ring to the inverting input
pin (V
common mode input voltage.
Connect the non-inverting pin (V
input with a wire that does not touch the
PCB surface.
Connect the guard ring to the non-inverting
input pin (V
to the same reference voltage as the op
amp’s input (e.g., V
Connect the inverting pin (V
with a wire that does not touch the PCB
surface.
High Speed PCB Layout
IN
–); this biases the guard ring to the
IN
+). This biases the guard ring
Example Guard Ring
V
IN
– V
12
DD
IN
/2 or ground).
. A 5V difference would
+
DS21685C-page 15
IN
–) to the input
IN
+) to the

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