MCP6291 N/A, MCP6291 Datasheet - Page 12

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MCP6291

Manufacturer Part Number
MCP6291
Description
MCP6291-2-3-4
Manufacturer
N/A
Datasheet

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MCP6291/2/3/4
3.4
Driving large capacitive loads can cause stability
problems for voltage feedback op amps. As the load
capacitance increases, the feedback loop’s phase
margin decreases and the closed-loop bandwidth is
reduced. This produces gain peaking in the frequency
response, with overshoot and ringing in the step
response. A unity-gain buffer (G = +1) is the most
sensitive to capacitive loads, though all gains show the
same general behavior.
When driving large capacitive loads with these op
amps (e.g., > 100 pF when G = +1), a small series
resistor at the output (R
feedback loop’s phase margin (stability) by making the
output load resistive at higher frequencies. It does not,
however, improve the bandwidth.
FIGURE 3-4:
stabilizes large capacitive loads.
To select R
(or step response overshoot) on the bench (or with the
MCP6291/2/3/4 SPICE Macro Model). If the response
is reasonable, you do not need R
R
reasonable.
3.5
With this family of operational amplifiers, the power
supply pin (V
bypass capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm
for good high-frequency performance. It also needs a
bulk capacitor (i.e., 1 µF or larger) within 100 mm to
provide large, slow currents. This bulk capacitor can be
shared with other parts.
DS21812B-page 12
ISO
V
IN
at 100 and modify its value until the response is
Capacitive Loads
Supply Bypass
ISO
+
MCP6291
DD
, check the frequency response peaking
for single supply) should have a local
Output resistor, R
ISO
in Figure 3-4) improves the
R
ISO
ISO
C
L
. Otherwise, start
ISO
V
OUT
3.6
In applications where low input bias current is critical,
PCB (printer circuit board) surface leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low humidity conditions, a typical resistance
between nearby traces is 10
cause 5 pA, if current-to-flow, which is greater than the
MCP6291/2/3/4 family’s bias current at 25°C (1 pA,
typ).
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
An example of this type of layout is shown in
Figure 3-5.
FIGURE 3-5:
for Inverting Gain.
1.
2.
For Inverting (Figure 3-5) and Transimpedance
Amplifiers (convert current to voltage, such as
photo detectors):
a.
b.
Non-inverting Gain and Unity-Gain Buffer:
a.
b.
PCB Surface Leakage
Connect the guard ring to the non-inverting
input pin (V
to the same reference voltage as the op
amp (e.g., V
Connect the inverting pin (V
with a wire that does not touch the PCB
surface.
Connect the non-inverting pin (V
input with a wire that does not touch the
PCB surface.
Connect the guard ring to the inverting input
pin (V
common mode input voltage.
IN
-). This biases the guard ring to the
V
IN
IN
DD
Guard Ring
+). This biases the guard ring
Example Guard Ring Layout
-
/2 or ground).
2003 Microchip Technology Inc.
12
. A 5V difference would
V
IN
+
IN
-) to the input
IN
V
SS
+) to the

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