TDA9809 Philips Semiconductors, TDA9809 Datasheet - Page 7

• Manufacturer Part Number: TDA9809
• Description: Single standard multimedia IF-PLL and FM radio demodulator
• Manufacturer: Philips Semiconductors

Philips Semiconductors
The FM-PLL consists of an integrated relaxation oscillator,
an integrated loop filter and a phase detector.
The oscillator is locked to the FM intercarrier signal output
from the limiter. As a result of locking, the oscillator
frequency tracks with the modulation of the input signal
and the oscillator control voltage is superimposed on the
AF voltage. The FM-PLL operates as an FM demodulator.
The level detector detects, rectifies and amplifies the
output signals from the first 5 limiter stages. These signals
are then summed and the composite signal passed
through a low-pass filter, followed by a 6 dB output
amplifier. A DC voltage dependent on the limiter input level
is generated for controlling the behaviour of the AF soft
mute. The 6 dB output amplifier can be switched off via the
control logic and the level detector output signal fed to
pin 14. Furthermore, the steepness of the level detector
output signal tracks that of the power supply voltage.
The radio Automatic Frequency Control (AFC) stage is
comprised of a 10.7 MHz phase shifting network, a phase
detector (quadrature demodulator), a differential amplifier
input stage (which receives the limiting amplifier output
signal) and a current mode output stage.
A ceramic resonator is used for phase shifting. This
permits alignment-free operation.
AF signal processing
The AF signal processing stage consists of a pre-amplifier
for the FM-PLL demodulator output signal, an AF source
selector, a soft and forced mute stage with an integrated
time constant and an AF post-amplifier.
The FM demodulator output signal is pre-amplified by an
operational amplifier (30 dB gain) with internal feedback,
high gain and high common mode rejection. The feedback
circuit, together with external capacitor C
pin 9, keeps the DC level at the pre-amplifier output
constant (2.3 V). An external resistor connected in series
with C
The low-pass filter characteristic (130 kHz bandwidth) of
the amplifier reduces the harmonics of the IF signal at the
sound signal output.
1998 Jan 08
Single standard multimedia IF-PLL and FM
radio demodulator
DEC
provides a gain reduction capability.
DEC
connected to
7
Soft mute occurs when the internal level detector output
voltage is lower than the mute threshold voltage at pin 8
(provided an external resistor is not connected between
the limiter input, pin 11, and the supply voltage). The mute
stage reduces the AF signal by 25 dB, with an internal time
constant of approximately 7 ms.
If a resistor is connected between pin 11 and ground
(forced mute), the mute stage will reduce the AF signal by
more than 70 dB with the same time constant.
Otherwise, the AF signal will not be reduced.
The AF post-amplifier, which was designed to include a
rail-to-rail output stage, provides the required AF output
level at pin 7.
Internal voltage stabilizer
The bandgap circuit generates a voltage of approximately
1.25 V internally, independent of supply voltage and
temperature. A voltage regulator circuit connected to this
voltage generates a constant 3.6 V which is used as an
internal reference voltage.
Logic
The logic circuit detects the logic levels and threshold
voltages at ports LP0 and LP2 and controls the internal
functions as described in Table 2.
Preliminary specification
TDA9809M