MCP6G04 Microchip Technology, MCP6G04 Datasheet - Page 22

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MCP6G04

Manufacturer Part Number
MCP6G04
Description
110 Selectable Gain Amplifier
Manufacturer
Microchip Technology
Datasheet

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MCP6G01/2/3/4
4.6
Good PC board layout techniques will help achieve the
performance
Characteristics”
Performance Curves”. It will also help minimize
Electromagnetic Compatibility (EMC) issues.
Because
response reaches unity gain at 10 MHz when G = 50, it
is important to use good PCB layout techniques. Any
parasitic coupling at high frequency might cause
undesired peaking. Filtering high frequency signals
(i.e., fast edge rates) can help.
4.6.1
Separate different circuit functions: digital from analog,
low speed from high speed, and low power from high
power. This will reduce crosstalk.
Keep sensitive traces short and straight. Separate
them from interfering components and traces. This is
especially important for high frequency (low rise time)
signals.
4.6.2
Use a local bypass capacitor (0.01 µF to 0.1 µF) within
2 mm of the V
performance. It must connect directly to ground.
Use a bulk bypass capacitor (i.e., 1.0 µF to 10 µF)
within 100 mm of the V
ground, and provides large, slow currents. This
capacitor may be shared with other nearby analog
parts.
Ground plane is important, and power plane(s) can
also be of great help. High frequency (e.g., multi-layer
ceramic capacitors), surface mount components
improve the supply’s performance.
4.6.3
The sources driving the inputs of the SGAs need to
have reasonably low source impedance at higher
frequencies.
resistance (R
and SGA package pin-to-pin capacitance (C
positive feedback voltage divider network. Feedback
may cause frequency response peaking and step
response overshoot and ringing.
DS22004A-page 22
Layout Considerations
the
COMPONENT PLACEMENT
SUPPLY BYPASS
INPUT SOURCE IMPEDANCE
Figure 4-7
S
), SGA package pin capacitance (C
shown
MCP6G01/2/3/4
DD
and
pin for good, high frequency
shows how the external source
DD
in
pin. It needs to connect to
Section 1.0
Section 2.0
SGAs’
“Electrical
P2
frequency
“Typical
) form a
P1
),
FIGURE 4-7:
Figure 2-10
results when a hostile signal is connected to the other
inputs (e.g., V
interest (e.g., V
of +50 was chosen for this plot because it
demonstrates the worst-case behavior. Increasing R
increases the crosstalk as expected. At a source
impedance of 10 MΩ, there is noticeable change in
behavior.
Most designs should use a source resistance (R
larger than 10 MΩ. Careful attention to layout parasitics
and proper component selection will help minimize this
effect. When a source impedance larger than 10 MΩ
must be used, place a capacitor in parallel to C
reduce the positive feedback. This capacitor needs to
be large enough to overcome gain (or crosstalk)
peaking, yet small enough to allow a reasonable signal
bandwidth.
4.6.4
The input pins of the MCP6G01/2/3/4 family of SGAs
are high impedance. This makes them especially
susceptible to capacitively coupled noise. Using a
ground plane helps reduce this problem.
When noise is capacitively coupled, the ground plane
provides additional shunt capacitance to ground. When
noise is magnetically coupled, the ground plane
reduces the mutual inductance between traces.
Increasing the separation between traces makes a
significant difference.
Changing the direction of one of the traces can also
reduce magnetic coupling. It may help to locate guard
traces next to the victim trace. They should be on both
sides of, and as close as possible to, the victim trace.
Connect the guard traces to the ground plane at both
ends. Also connect long guard traces to the ground
plane in the middle.
V
S
SIGNAL COUPLING
shows the crosstalk (referred to input) that
R
S
C
INB
INA
P1
) has R
through V
Positive Feedback Path.
© 2006 Microchip Technology Inc.
MCP6G0X
S
connected to GND. A gain
C
IND
P2
), and the input of
V
OUT
S
P1
) no
to
S

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