NCP1215A ON Semiconductor, NCP1215A Datasheet - Page 9

• Manufacturer Part Number: NCP1215A
• Description: Low Cost Variable OFF Time Switched Mode Power Supply Controller
• Manufacturer: ON Semiconductor

Primary Current Sensing
flows through the sense resistor R
voltage, V
the comparator connected to CS pin requires a positive
voltage, the voltage V
R
voltage V
50 mA depending on the Feedback Loop Control block
signal (see more details in the Feedback Loop Control
section).
differing output power demand.
shift
The primary current sensing circuit is shown in Figure 19.
When the primary switch is ON, the transformer current
The peak primary current is thus equal to:
A typical CS pin voltage waveform is shown in Figure 20.
Figure 20 also shows the effect of the inductor current of
V
by a current source which level−shifts the negative
shift
V
0
cs
Figure 19. Primary Current Sensing
cs
. The level−shift current is in range from 12.5 to
I
I
shift
shift
Turn−on
which is negative with respect to GND. Since
Switch
R
= 50 mA
= 12.5 mA
Figure 20. CS Pin Voltage
shift
FB
CS
I pk +
R
V
CS
CS
shift
12.5 mA
50 mA
R shift
B
R CS
is developed across the resistor
· I CS
GND
cs
+
Feedback Loop
−
. The current creates a
I
primary
Control
To Latch
(eq. 1)
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NCP1215A
t
9
the following benefits compared to the traditional approach:
•
•
•
Gate Driver
directly drive a power MOSFET.
optimize turn ON and OFF performance without additional
external components. Since the power MOSFET turns off at
high drain current, to minimize its turn−off losses the sink
capability of the gate driver is increased for a faster turn−off.
To the opposite, the source capability is lower to slow−down
power MOSFET at turn−on in order to reduce the EMI noise.
undervoltage threshold, the Gate Driver is low, pulling down
the gate to ground. It eliminates the need for an external
resistor.
Startup Circuit
voltage potential of the input bulk capacitor and V
capacitor. The value of the resistor can be calculated as
follows:
than V
way:
The primary current sensing method we described, brings
The Gate Driver consists of a CMOS buffer designed to
It features an unbalanced source and sink capabilities to
Whenever the IC supply voltage is lower than the
An external startup resistor is connected between high
Where:
V
I
V
Since the V
The startup current can be calculated as follows:
Where:
C
t
I
Maximum peak voltage across the current sense resistor
is determined and can be optimized by the value of the
shift resistor.
CS pin is not exposed to negative voltage, which could
induce a parasitic substrate current within the IC and
distort the surrounding internal circuitry.
The gate drive capability is improved because the
current sense resistor is located out of the gate driver
loop and does not deteriorate the turn−on and also
turn−off gate drive amplitude.
startup
startup
CC−start
Vcc
startup
bulk
startup
I startup + C Vcc
the equation can be simplified in the following
R startup +
bulk
V
(see spec.)
Startup current
Input bulk capacitor’s voltage
V
Startup time
IC current consumption (see spec.)
CC
CC
voltage has obviously much higher value
R startup +
voltage at which IC starts operation
capacitor value
V bulk * V startup
V startup
t startup
I startup
I startup
V bulk
) I CC−start
CC
(eq. 2)
(eq. 3)
(eq. 4)
supply