UM61512A UMC, UM61512A Datasheet - Page 7
UM61512A
Manufacturer Part Number
UM61512A
Description
64k x 8 Bit High Speed CMOS SRAM
Manufacturer
UMC
Datasheet
1.UM61512A.pdf
(16 pages)
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Timing Waveforms (continued)
Read Cycle 4
Notes: 1. WE is high for Read Cycle.
2. Device is continuously enabled CE1 = V
3. Address valid prior to or coincident with CE1 transition low.
4. OE = V
5. Transition is measured 500mV from steady state. This parameter is sampled and not 100% tested.
6. CE2 is high.
7. CE1 is low.
8. Address valid prior to or coincident with CE2 transition high.
Address
D
CE1
CE2
OE
OUT
(1)
IL
.
t
t
CLZ2 5
CLZ2
5
t
t
ACE1
ACE2
IL
t
AA
t
OLZ 5
and CE2 = V
t
OE
7
t
RC
IH
.
t
CHZ1 5
t
CHZ2
t
OH
t
OHZ
5
5
UM61512A