MTD516 Myson, MTD516 Datasheet

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MTD516

Manufacturer Part Number
MTD516
Description
16 Port 10M/100M Ethernet Switch
Manufacturer
Myson
Datasheet
FEATURES
• IEEE802.3 and IEEE802.3u compliant.
• Provide 16 RMII (Reduced Media Independent
• Programmable 1K/8K MAC addresses filtering
• Store and forward switching function and bad
• Optional back_pressure/802.3x flow control/
• Optional EEPROM Interface for advanced
• 4MB/2MB packet buffer with SGRAM/SDRAM
• Port VLAN/trunking.
• Link/Rx activity, packet buffer utilization LED
• 83MHz for non-blocking 16 port switch.
• Build in internal/external memory test function.
• 208 pin PQFP package, 3.3V operation volt-
This datasheet contains new product information. Myson Technology reserves the rights to modify the product specification
without notice. No liability is assumed as a result of the use of this procuts. No rights under any patent accompany the sales of
the product.
BLOCK DIAGRAM
Interface) ports.
database.
packet filtering function.
flooding control/broadcast control.
switch configurations.
flexible memory interface.
display.
age.
SDRAM/
SGRAM
Interface
MYSON
TECHNOLOGY
16 Port 10M/100M Ethernet Switch
Controller
Memory
Memory
Arbiter
Port
Switch
Logic
1/27
IEEE802.3, 802.3u and 802.3x specifications and
is a non-blocking 16 port 10M/100M Ethernet
switch device.
ation. 4MB memory interface provides maximum
2730 packet buffers for Ethernet packet buffering.
Up to 8192 address entrys are provided by the
MTD516, and the MTD516 use full Ethernet
address compare algorithm to minimize hashing
collision events.
to config port trunking, port VLAN, static entry,
802.3x flow control threshold, flooding port,
broadcast control threshold. Each MTD516 ports
support 10M/100M auto-negotiation by MII man-
agement interface.
RX activity, packet buffer utilization LED display
function.
GENERAL DESCRIPTION
DMA0
DMA1
DMA2
DMA3
DMA4
DMA13
DMA14
DMA15
The MTD516 complies fully with the
Support 16 RMII ports for 10M/100M oper-
The MTD516 provides EEPROM interface
The MTD516 also provides 2 pins for Link/
MAC0
MAC1
MAC2
MAC3
MAC4
MAC13
MAC14
MAC15
MTD516 Revision 1.2 19/06/2000
(Preliminary)
MTD516
RMII0
RMII1
RMII2
RMII3
RMII12
RMII13
RMII14
RMII15
3~12

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MTD516 Summary of contents

Page 1

... VLAN, static entry, 802.3x flow control threshold, flooding port, broadcast control threshold. Each MTD516 ports support 10M/100M auto-negotiation by MII man- agement interface. The MTD516 also provides 2 pins for Link/ RX activity, packet buffer utilization LED display function. DMA0 MAC0 ...

Page 2

... No liability is assumed as a result of the use of this procuts. No rights under any patent accompany the sales of the product. (**OPTION) EEPROM MTD516 RMII0-7 OCTAL PHYsceiver MII management OCTAL Transformer RJ45 2/27 MTD516 (Preliminary) LEDs RMII11-15 OCTAL PHYsceiver OCTAL Transformer RJ45 MTD516 Revision 1.2 19/06/2000 ...

Page 3

... DQ49 89 DQ50 88 DQ51 87 DQ52 86 DQ53 85 DQ54 84 DQ55 83 VCC 82 SYSCLK 81 GND 80 RXD15_1 79 RXD15_0 78 CRSDV15 77 TXEN15 76 TXD15_0 75 TXD15_1 74 RXD14_1 73 RXD14_0 72 CRSDV14 71 TXEN14 70 TXD14_0 69 TXD14_1 68 VCC 67 GND 66 RXD13_1 65 RXD13_0 64 CRSDV13 63 TXEN13 62 TXD13_0 61 TXD13_1 60 RXD12_1 59 RXD12_0 58 CRSDV12 57 TXEN12 56 TXD12_0 55 TXD12_1 54 RXD11_1 53 RXD11_0 MTD516 Revision 1.2 19/06/2000 ...

Page 4

... Port5 RMII receive interface signal, CRSDV5 is asserted high when port5 media is non_idle. I Port5 RMII receive data bit_0. I Port5 RMII receive data bit_1. O Port5 RMII transmit enable signal. O Port5 RMII transmit data bit_0. O Port5 RMII transmit data bit_1. 4/27 MTD516 (Preliminary) MTD516 Revision 1.2 19/06/2000 ...

Page 5

... Port11 RMII receive interface signal, CRSDV11 is asserted high when port11 media is non_idle. I Port11 RMII receive data bit_0. I Port11 RMII receive data bit_1. O Port11 RMII transmit enable signal. O Port11 RMII transmit data bit_0. O Port11 RMII transmit data bit_1. 5/27 MTD516 (Preliminary) MTD516 Revision 1.2 19/06/2000 ...

Page 6

... Port15 RMII receive interface signal, CRSDV15 is asserted high when port15 media is non_idle. I Port15 RMII receive data bit_0. I Port15 RMII receive data bit_1. O Port15 RMII transmit enable signal. O Port15 RMII transmit data bit_0. O Port15 RMII transmit data bit_1. 6/27 MTD516 (Preliminary) MTD516 Revision 1.2 19/06/2000 ...

Page 7

... I/O After ResetB deassert this pin be indicated EEDATA, After 150 ms, it indicate SDIO. I/O LED Clock. Using bursted clock for latching 32 display informations (one clock latch one information) , per burst have 32 continuous clocks (clock period = 320 ns); and the time between burst to burst is 655 us. 7/27 MTD516 (Preliminary) MTD516 Revision 1.2 19/06/2000 ...

Page 8

... LEDCLK LEDDATA 01 P0_RxAct 02 P1_RxAct 03 P2_RxAct 04 P3_RxAct 05 P4_RxAct 06 P5_RxAct 07 P6_RxAct 08 P7_RxAct 09 P8_RxAct 10 P9_RxAct 11 P10_RxAct 12 P11_RxAct 13 P12_RxAct 14 P13_RxAct 15 P14_RxAct 16 P15_RxAct 8/27 MTD516 (Preliminary) LEDCLK LEDDATA 17 Uti_1% 18 Uti_3% 19 Uti_5% 20 Uti_10% 21 Uti_15% 22 Uti_20% 23 Uti_30% 24 Uti_35% 25 Uti_40% 26 Uti_50% 27 Uti_60% 28 Uti_70% 29 Uti_80% 30 Uti_90% 31 BufferAlarm 32 MemTestFail MTD516 Revision 1.2 19/06/2000 ...

Page 9

... For 12 port switch, only Port11~Port0 enable. external pull_hgih =1, 12 port switch enable. external pull_low = 0, default is 16 port switch. 0 Port 15 FX function indicator. external pull_hgih =1, port15 FX function enable. external pull_low = 0, port15 FX function disable. 9/27 MTD516 (Preliminary) MTD516 Revision 1.2 19/06/2000 ...

Page 10

... Flooding Port ID bit 3 external pull_hgih =1. external pull_low = 0. 0 Flooding Port ID bit 2 external pull_hgih =1. external pull_low = 0. 0 Flooding Port ID bit 1 external pull_hgih =1. external pull_low = 0. 0 Flooding Port ID bit 0 external pull_hgih =1. external pull_low = 0. 10/27 MTD516 (Preliminary) MTD516 Revision 1.2 19/06/2000 ...

Page 11

... TECHNOLOGY 4.0 FUNCTIONAL DESCRIPTIONS The MTD516 ports 10/100 Mbps fast Ethernet switch controller low cost solution for six- teen ports fast Ethernet SOHO switch design. No CPU interface is required; After power on reset, MTD516 provide an auto load configuration setting function through a 2 wire serial EEPROM interface to acess external EEPROM device, and MTD516 can easily be configured to support port_trunking, port_ VLAN, static entry, 802 ...

Page 12

... When output port buffer queue’ s on_using value reach the initialization setting threshold value (same with the Xon_TH value), MTD516 will send a JAM pattern in the input port when it senses an incoming packet , thus force a collision to inform the remote node transmission back off and will effectively avoid dropping packets. If the “ ...

Page 13

... Section5.0 (Internal MII Registers). 4.14 LED Display The MTD516 use 2 pins to output 2 kinds of LED display -- LEDDATA, LEDCLK, Using LEDCLK rising edge with 32 bits shift register to latch LEDDATA as DATA[31:0]. DATA[15:0] report Port15~0 link/receive activity led status. DATA[29:16] report packet buffer utilization rating, and DATA[31] report external memory test result(after power reset, MTD516 will test external SDRAM auto- matically), DATA[30] report the buffer almost full alarm signal ...

Page 14

... Disable bit[9:6]= 0 means group 0 , etc ... bit[13:10 means Port0, etc,... Reserved 16’h0000 Descriptions XON threshold XOFF threshold XON threshold default is 8’d64(2M) XOFF threshold default is 8’h28(2M) P.S while EEPROM is enabled, this register’ s content will be updated by EEPROM. 14/27 MTD516 (Preliminary) MTD516 Revision 1.2 19/06/2000 ...

Page 15

... P.S this register’ s writing sequence is Jumper setting ==> EEPROM ==>MII management command. Descriptions Reserved Specify port8’ s uplink port ID Specify port7’ s uplink port ID Specify port6’ s uplink port ID Default is 16’h0000. P.S this register’ s writing sequence is Jumper setting ==> EEPROM ==>MII management command. 15/27 MTD516 (Preliminary) MTD516 Revision 1.2 19/06/2000 ...

Page 16

... Default is 16’h0000. P.S this register’ s writing sequence is Jumper setting ==> EEPROM ==>MII management command. Descriptions Reserved Backpressure Enhance Mode Enable. Specify broadcast storm threshold Default is 16’h00ff. P.S this register’ s writing sequence is Jumper setting ==> EEPROM ==>MII management command. 16/27 MTD516 (Preliminary) MTD516 Revision 1.2 19/06/2000 ...

Page 17

... Buffer Table Bist Error Buffer Table Bist Done Descriptions Output MII polling port15-0 flow control information. P.S “1” means flow control is enabled when Polling disabled, default value is 16’hffff when Polling enabled, default value is 16’h0000. 17/27 MTD516 (Preliminary) MTD516 Revision 1.2 19/06/2000 ...

Page 18

... Polling disabled, default value is 16’hffff when Polling enabled, default value is 16’h0000. Descriptions “1” disable port15-0 local packet filter function. Default is 16’h0000 Descriptions “1” disable port15-0 Rx Length Check function. Default is 16’h0000 18/27 MTD516 (Preliminary) MTD516 Revision 1.2 19/06/2000 ...

Page 19

... Default is 16’h0000 Descriptions “1” fix port15-0 random backoff number. Default is 16’h0000 Descriptions Reserved Default is 16’h0000 Descriptions Reserved. Output Free List Head ID Descriptions Reserved. Output Free List Tail ID Descriptions Reserved. Output Free List Count Value. 19/27 MTD516 (Preliminary) MTD516 Revision 1.2 19/06/2000 ...

Page 20

... Port2 VLAN Low Byte Register. Descriptions “1” disable Port 15-0 Default value is 16’h0000 Descriptions Reserved Output Port Tx Queue Head Value Descriptions Reserved Output Port Tx Queue Count Value Descriptions Select Port VLAN Group. EEPROM Content Descriptions 20/27 MTD516 (Preliminary) MTD516 Revision 1.2 19/06/2000 ...

Page 21

... Port 10 flooding port. [7:5] Reserved. h2e Uplink11 [4:0] Port 11 flooding port. [7:5] Reserved. Uplink12 h2f [4:0] Port 12 flooding port. [7:5] Reserved. h30 Uplink13 [4:0] Port 13 flooding port. [7:5] Reserved. h31 Uplink14 [4:0] Port 14 flooding port. [7:5] Reserved. Uplink15 h32 [4:0] Port 15 flooding port. [7:5] Reserved. EEPROM Content Descriptions 21/27 MTD516 (Preliminary) MTD516 Revision 1.2 19/06/2000 ...

Page 22

... DisPortH Disable Port 15-8 h38 System control byte bit0-- Enhance Backpressure Enable CtrlEnable [7:1] Reserved. h39- Reserved h3f h40- 45[7:0]~40[7:0] means Static SA[47:0], StaticSA1 h46 46[3:0] means Port ID, 46[7:4] Reserved. h47- 4c[7:0]~47[7:0] means Static SA[47:0], StaticSA2 h4d 47[3:0] means Port ID, 47[7:4] Reserved. EEPROM Content Descriptions 22/27 MTD516 (Preliminary) MTD516 Revision 1.2 19/06/2000 ...

Page 23

... Typ. 3.0 3 -40 25 Conditions Min. no pull-up or down -1 -1 2.7 2.7 CMOS CMOS 0.7*Vcc I =2,4,8,12,16,24mA OL I =2,4,8,12,16,24mA 2 = 23/27 MTD516 Unit Max. Unit 3.6 V Vcc V 115 C 125 C Typ. Max. Unit 2.8 pF 4.9 pF 4.9 pF 0.3*Vcc KOhm o C) MTD516 Revision 1.2 19/06/2000 ...

Page 24

... T8 Row active to burst write T1 T2 Valid T3 T4 Valid Min. Typ Valid Valid T6 T7 Valid Min. Typ 24/27 MTD516 (Preliminary) Max. Unit Note Max. Unit Note CLK MTD516 Revision 1.2 19/06/2000 ...

Page 25

... EEPROM clock cycle T12 EEDATA input setup time T13 EEDATA input hold time Valid Min. Typ T11 T13 T12 Valid Min. Typ 25/27 MTD516 (Preliminary) T9 T10 Valid Max. Unit Note nS nS Max. Unit Note MTD516 Revision 1.2 19/06/2000 ...

Page 26

... MYSON TECHNOLOGY FIGURE 5. LED Inter face LEDCLK LEDDATA Valid Symbol Parameter T14 Led display strobe period T15 LEDCLK setup time T16 LEDCLK hold time (Preliminary) T14 T16 T15 Valid Valid Min. Typ. Max 26/27 MTD516 Unit Note MTD516 Revision 1.2 19/06/2000 ...

Page 27

... REF 8 REF REF 8 REF 3 c 0.09 0.15 0.20 0.004 0.006 0.008 L 0.45 0.60 0.75 0.018 0.024 0.030 L1 1.30 REF 0.052 REF 0.20 - 0.008 e 0.50 BSC 0.020 BSC L1 b 0.17 0.20 0.27 0.007 0.008 0.011 C 2 0.25mm 3 S Detail MTD516 Revision 1.2 19/06/2000 Max - - ...

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