LM3S1439 Luminary Micro, Inc, LM3S1439 Datasheet - Page 157

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LM3S1439

Manufacturer Part Number
LM3S1439
Description
Lm3s1439 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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Reset
Reset
Type
Type
Flash Memory Protection Read Enable 1 (FMPRE1)
Base 0x400F.E000
Offset 0x204
Type R/W, reset 0x0000.FFFF
July 25, 2008
Bit/Field
31:0
R/W
R/W
31
15
0
1
R/W
R/W
Register 13: Flash Memory Protection Read Enable 1 (FMPRE1), offset 0x204
Note:
This register stores the read-only protection bits for each 2-KB flash block (FMPPEn stores the
execute-only bits). This register is loaded during the power-on reset sequence. The factory settings
for the FMPREn and FMPPEn registers are a value of 1 for all implemented banks. This achieves
a policy of open access and programmability. The register bits may be changed by writing the
specific register bit. However, this register is R/W0; the user can only change the protection bit from
a 1 to a 0 (and may NOT change a 0 to a 1). The changes are not permanent until the register is
committed (saved), at which point the bit change is permanent. If a bit is changed from a 1 to a 0
and not committed, it may be restored by executing a power-on reset sequence. For additional
information, see the "Flash Memory Protection" section.
30
14
0
1
READ_ENABLE
R/W
R/W
29
13
0
1
Name
Offset is relative to System Control base address of 0x400FE000.
R/W
R/W
28
12
0
1
R/W
R/W
27
11
0
1
Type
R/W
R/W
R/W
26
10
0
1
0x0000FFFF
Reset
R/W
R/W
25
0
9
1
Preliminary
READ_ENABLE
READ_ENABLE
R/W
R/W
24
0
8
1
Description
Flash Read Enable
Enables 2-KB flash blocks to be executed or read. The policies may be
combined as shown in the table “Flash Protection Policy Combinations”.
Value
0x0000FFFF
R/W
R/W
23
0
7
1
Description
Enables 96 KB of flash.
R/W
R/W
22
0
6
1
R/W
R/W
21
0
5
1
R/W
R/W
20
0
4
1
LM3S1439 Microcontroller
R/W
R/W
19
0
3
1
R/W
R/W
18
0
2
1
R/W
R/W
17
0
1
1
R/W
R/W
16
0
0
1
157

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