LM3S1960 Luminary Micro, Inc, LM3S1960 Datasheet - Page 25

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LM3S1960

Manufacturer Part Number
LM3S1960
Description
Lm3s1960 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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July 25, 2008
ARM FiRM-compliant Watchdog Timer
Synchronous Serial Interface (SSI)
UART
16-bit Input Capture modes
16-bit PWM mode
32-bit down counter with a programmable load register
Separate watchdog clock with an enable
Programmable interrupt generation logic with interrupt masking
Lock register protection from runaway software
Reset generation logic with an enable/disable
User-enabled stalling when the controller asserts the CPU Halt flag during debug
Two SSI modules, each with the following features:
Master or slave operation
Programmable clock bit rate and prescale
Separate transmit and receive FIFOs, 16 bits wide, 8 locations deep
Programmable interface operation for Freescale SPI, MICROWIRE, or Texas Instruments
synchronous serial interfaces
Programmable data frame size from 4 to 16 bits
Internal loopback test mode for diagnostic/debug testing
Three fully programmable 16C550-type UARTs with IrDA support
Separate 16x8 transmit (TX) and 16x12 receive (RX) FIFOs to reduce CPU interrupt service
loading
Programmable baud-rate generator allowing speeds up to 3.125 Mbps
Programmable FIFO length, including 1-byte deep operation providing conventional
double-buffered interface
FIFO trigger levels of 1/8, 1/4, 1/2, 3/4, and 7/8
Standard asynchronous communication bits for start, stop, and parity
Input edge count capture
Input edge time capture
Simple PWM mode with software-programmable output inversion of the PWM signal
Preliminary
LM3S1960 Microcontroller
25

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