LM3S8930 Luminary Micro, Inc, LM3S8930 Datasheet - Page 368

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LM3S8930

Manufacturer Part Number
LM3S8930
Description
Lm3s8930 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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Reset
Reset
Type
Type
Inter-Integrated Circuit (I
Write-Only Control Register
I2C Slave Control/Status (I2CSCSR)
I2C Slave 0 base: 0x4002.0800
Offset 0x004
Type WO, reset 0x0000.0000
368
Bit/Field
Bit/Field
31:1
0
0
RO
RO
31
15
0
0
RO
RO
30
14
0
0
reserved
RO
RO
29
13
RREQ
0
0
Name
Name
DA
2
C) Interface
RO
RO
28
12
0
0
RO
RO
27
11
0
0
Type
Type
WO
RO
RO
RO
RO
26
10
0
0
Reset
Reset
0x00
RO
RO
25
0
0
9
0
0
Preliminary
reserved
RO
RO
24
0
8
0
Description
Receive Request
This bit specifies the status of the I
receive requests. If set, the I
the I
data has been read from the I2CSDR register. Otherwise, no receive
data is outstanding.
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Device Active
Value
reserved
0
1
2
C master and uses clock stretching to delay the master until the
RO
RO
23
Description
Disables the I
Enables the I
0
7
0
RO
RO
22
0
6
0
2
2
C slave operation.
C slave operation.
RO
RO
21
0
5
0
2
C unit has outstanding receive data from
RO
RO
20
0
4
0
2
C slave with regards to outstanding
RO
RO
19
0
3
0
RO
RO
18
0
2
0
July 25, 2008
RO
RO
17
0
1
0
WO
RO
DA
16
0
0
0

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