LM3S2730 Luminary Micro, Inc, LM3S2730 Datasheet - Page 175

• Manufacturer Part Number: LM3S2730
• Description: Lm3s2730 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

9.2
9.2.1
July 25, 2008
Figure 9-1. GPTM Module Block Diagram
Table 9-1. Available CCP Pins
Functional Description
The main components of each GPTM block are two free-running 16-bit up/down counters (referred
to as TimerA and TimerB), two 16-bit match registers, two prescaler match registers, and two 16-bit
load/initialization registers and their associated control functions. The exact functionality of each
GPTM is controlled by software and configured through the register interface.
Software configures the GPTM using the GPTM Configuration (GPTMCFG) register (see page 186),
the GPTM TimerA Mode (GPTMTAMR) register (see page 187), and the GPTM TimerB Mode
(GPTMTBMR) register (see page 189). When in one of the 32-bit modes, the timer can only act as
a 32-bit timer. However, when configured in 16-bit mode, the GPTM can have its two 16-bit timers
configured in any combination of the 16-bit modes.
GPTM Reset Conditions
After reset has been applied to the GPTM module, the module is in an inactive state, and all control
registers are cleared and in their default states. Counters TimerA and TimerB are initialized to
0xFFFF, along with their corresponding load registers: the GPTM TimerA Interval Load
Timer
Timer 0
Timer 1
Timer 2
Interrupt
TimerA
Interrupt
TimerB
System
Clock
16-Bit Up/Down Counter
TimerA
TimerB
TimerA
TimerB
TimerA
TimerB
Interrupt / Config
GPTMCFG
GPTMCTL
GPTMIMR
GPTMRIS
GPTMMIS
GPTMICR
GPTMTAMATCHR
GPTMTBMATCHR
TimerA Control
TimerB Control
Even CCP Pin
CCP0
-
CCP2
-
-
-
GPTMTAPMR
GPTMTBPMR
GPTMTAILR
GPTMTAMR
GPTMTBILR
GPTMTBMR
GPTMTAPR
GPTMTBPR
Preliminary
Odd CCP Pin
-
CCP1
-
CCP3
-
-
TA Comparator
TB Comparator
GPTMTBR
0x0000 (Down Counter Modes)
0x0000 (Down Counter Modes)
GPTMAR
En
En
LM3S2730 Microcontroller
Clock / Edge
Clock / Edge
RTC Divider
Detect
Detect
32 KHz or
Even CCP Pin
Odd CCP Pin
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