ATF2500C ATMEL Corporation, ATF2500C Datasheet

ATF2500C

Manufacturer Part Number

ATF2500C

Description

ATF2500C CPLD Family Datasheet

Manufacturer

ATMEL Corporation

Datasheet

1.ATF2500C.pdf (37 pages)

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Features

•

Block Diagram

Description

The ATF2500C is the highest-density PLD available in a 44-pin package. With its fully

connected logic array and flexible macrocell structure, high gate utilization is easily

obtainable. The ATF2500C is a high-performance CMOS (electrically-erasable) pro-

grammable logic device (PLD) that utilizes Atmel’s proven electrically-erasable

technology.

Pin Configurations

Pin Name

CLK/IN

I/O

I/O 0,2,4...

I/O 1,3,5...

GND

VCC

High-performance, High-density, Electrically-erasable Programmable Logic Device

Fully Connected Logic Array with 416 Product Terms

10 ns Maximum Pin-to-pin Delay for 5V Operation

Low-power Edge-sensing “L” Option with <1 mA Standby Current

24 Flexible Output Macrocells

D- or T-type Flip-flops

Product Term or Direct Input Pin Clocking

Registered or Combinatorial Internal Feedback

Backward Compatible with ATV2500B/BQL and ATV2500H/L Software

Advanced Electrically-erasable Technology

44-lead Surface Mount Package

– 48 Flip-flops – Two per Macrocell

– 72 Sum Terms

– All Flip-flops, I/O Pins Feed in Independently

– Reprogrammable

– 100% Tested

Function

Logic Inputs

Pin Clock and Input

Bi-directional Buffers

“Even” I/O Buffers

“Odd” I/O Buffers

Ground

+5V Supply

Note:

I/O17

I/O16

I/O15

I/O14

I/O13

I/O12

VCC

I/O0

I/O1

I/O2

I/O3

I/O4

I/O5

For

(PLCC/LCC/JLCC packages) pin 4 and pin 26

GND connections are not required.

DIP

I/O6

I/O7

I/O8

I/O9

I/O10

I/O11

GND

I/O23

I/O22

I/O21

I/O20

I/O19

I/O18

ATF2500CQ

I/O17

I/O16

I/O15

I/O14

I/O13

VCC

I/O2

I/O3

I/O4

I/O5

PLCC/LCC/JLCC

and

ATF2500CQL

I/O7

I/O8

I/O9

I/O10

I/O11

GND

I/O23

I/O22

I/O21

I/O20

ATF2500C

CPLD Family

Datasheet

ATF2500C

ATF2500CL

ATF2500CQ

ATF2500CQL

Preliminary

Rev. 0777G–12/01

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