CS1242 Shenzhen, CS1242 Datasheet
CS1242
Related parts for CS1242
CS1242 Summary of contents
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... Copyright Reserved CS1242 Specification May.2005 Shenzhen Chipsea Technologies CO., LTD. www.chipsea.com -28 ...
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... DESCRIPTION......................................................................................................................... 5 2 CS1242 CHARACTERISTIC DESCRIPTION.......................................................................... 6 2.1 ABSOLUTE MAXIMUM RATINGS ...................................................................................... 6 2.2 DIGITAL CHARACTERISTICS ............................................................................................. 6 www.DataSheet4U.com 2.3 PINS and PACKAGING........................................................................................................... 7 2.4 ELECTRICAL CHARACTERISTICS ..................................................................................... 9 2.5 TIMING CHARACTERISTICS............................................................................................. 11 3 CS1242 FUNCTION MODULE DESCRIPTION .................................................................... 13 3.1 INPUT MULTIPLEXER ........................................................................................................ 13 3.2 ANALOG INPUT BUFFER ................................................................................................... 13 3.3 PROGRAMMABLE GAIN AMPLIFIER (PGA) .................................................................. 14 3.4 MODULATOR ....................................................................................................................... 14 3.5 CALIBRATION...................................................................................................................... 14 3.5.1 SELF CALIBRATION ..................................................................................................... 14 3.5.2 SYSTEM CALIBRATION ............................................................................................... 14 3.6 EXTERNAL VOLTAGE REFERENCE ................................................................................ 15 3 ...
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... The Sample Frequency of The Modulator............................................................................14 Table 9 The Relation Between External Reference Voltage and RAN .............................................15 Table 10 Table 11 Copyright Reserved CS1242 Specification Diagram Lists CS1242 Principle Block Diagram ..................................................................................... 5 Pin Diagram ...................................................................................................................... 7 Timing Diagram ...............................................................................................................11 Schematic of Input Multiplexer........................................................................................13 Schematic of Using External Crystal ...............................................................................15 Table Lists Registers List....................................................................................................................18 Commands Table..............................................................................................................23 Shenzhen Chipsea Technologies CO ...
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... CS1242 DESCRIPTION The CS1242 is precision, low power dissipation, Analog-to-Digital (A/D) converter with 24-bit resolution and up to 21-bit ENOB. The CS1242 has world wide applications in industrial process control, weigh scales, liquid/gas chemical analysis, blood analysis, smart transmitters and portable instrumentation. 1.1 CS1242 FEATURES 24 bits no missing code, 21 bits effective precision Analog-to-Digital converters Simultaneous 50Hz and 60Hz rejection (reaching － ...
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... DESCRIPTION The CS1242 principle block diagram is shown in Figure 1. The CS1242 bits Sigma-Delta analog-to-digital converter chip with high accuracy and low power dissipation. The CS1242 works from 2.7V to 5.5V power supplies with 21 bits ENOB. The input channels are multiplexed, and analog input buffer can be selected to provide very high input impedance or direct input ...
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... Transient Input Current Continuous Input Current Digital Input Voltage to DGND Digital Output Voltage to DGND Max Junction Temperature Operating Temperature Storage Temperature Lead Temperature (Soldering, 10s) 2.2 DIGITAL CHARACTERISTICS Table 2 shows the digital characteristics of the CS1242. PARAMETER VIH VIL VOH VOL IIH IIL fosc tosc NOTES： ...
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... PINS and PACKAGING The pins of the CS1242 are shown in Figure 2, and particular description refers to Table3. www.DataSheet4U.com PIN NUMBER 1 DVDD 2 DGND 3 MCLK 4 XTAL 5 6 SYNC DGND 9 REFP 10 REFN 11 AIN0 12 AIN1 13 AIN2 14 AIN3 AGND 17 AVDD 18 POL SDI 21 SDO 22 SCLK 23 24 ...
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... The CS1242 uses SSOP-24 package, the temperature range of the CS1242 is from -40℃ to +85℃, seeing the Table 4. NAME CS1242 www.DataSheet4U.com Copyright Reserved CS1242 Specification Table 4 Package PACKAGE TEMPERATURE RANGE SSOP－24 －40℃～85℃ Shenzhen Chipsea Technologies CO., LTD. www.chipsea.com 8 -28 ...
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... Common-mode input rejection Bias current Power-supply voltage Current of analog part Power- supply Current of digital part (DVDD = 5V) Power dissipation Copyright Reserved CS1242 Specification Table 5 Electrical Characteristics (AVDD=5V) CONDITIONS MIN Buffer OFF AGND-0.1 Buffer ON AGND+0.4 RAN=0 RAN=1 Buffer OFF Buffer 3.75Hz DATA ...
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... Common-mode input rejection Bias current Power-supply voltage Current of analog part Power- supply Current of digital part (DVDD = 3V) Power dissipation Copyright Reserved CS1242 Specification Table 6 Electrical Characteristics (AVDD=3V) CONDITION MIN Buffer OFF AGND-0.1 Buffer ON AGND+0.3 RAN=0 RAN=1 Buffer OFF Buffer 3.75Hz DATA (- ...
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... SCLK www.DataSheet4U.com (POL = 1) SDI MSB SDO Note : ( 1) Bit order = 0; SCLK Reset Waveform SCLK DRDY SCLK Copyright Reserved CS1242 Specification dio LSB CS1242 Reset On the falling Edge DATA Figure 3 Timing Diagram Shenzhen Chipsea Technologies CO., LTD. ...
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... DOR update, DOR data is invalid 7 First SCLK after t 8 DRDY goes low Copyright Reserved CS1242 Specification Table 7 Timing Table DESCRIPTION RREG, WREG, SYNC, SLEEP, RDATA, RDATAC, STOPC GCALSELF, SELFOCA, OCALSYS, GCALSYS CALSELF RESET (also SCLK reset or RST pin gives off RESET command) ...
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... ANALOG INPUT BUFFER The input impedance of the CS1242 is about 5MΩ/PGA with the buffer off, but the input impedance about 5GΩ with the buffer on. The buffer can be controlled by the BUF pin and the register ACR. When the BUF bit in ACR register and BUF pin is high, the buffer is on ...
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... PGA=128, the full scale input is 39mV, the converter can resolve down to 75nV. 3.4 MODULATOR The Modulator of the CS1242 is a single loop, second order Sigma-Delta system. The sample frequency of the modulator is controlled by the SPEED bit in ACR register. The sample frequency is shown in Table8: www.DataSheet4U.com ...
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... CLOCK UNIT The clock source for the CS1242 can be provided from external clock, a crystal, or oscillator. If the clock source is external clock, the clock is only connected to MCLK pin, and the XTAL pin is unused. If the source is a crystal, the clock circuit is shown in Figure5: (two capacitances of 10~20pF connect to the MCLK and XTAL pins) 3 ...
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... STOPC or RESET can not be sent to the CS1242 through the bus to stop the RDATAC mode. However, if the data from SDO includes the command STOPC or RESET, SDI will detect the command, and the RDATAC mode will be stopped ...
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... POWER-UP RESET and CHIP RESET The power-on reset circuit is designed to reset the CS1242 automatically after power-up. The CS1242 can be reset through three methods when the CS1242 is working: pulling the RST pin down to low, sending RESET command, or sending specific waveform on the SCLK (the SCLK RESET waveform, as shown in the Timing Diagram of the CS1242) ...
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... CS1242 REGISTER DESCRIPTION The CS1242 configures the working mode through a series of control registers, which are used for controlling data format, MUX setting, data rate, calibration, etc. 4.1 RIGISTER LIST Registers list is shown in Table 10: Address Register www.DataSheet4U.com 00H SETUP 01H MUX 02H ACR ...
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... SETUP Reserved SETUP. 2－0 : PGA2/PGA1/PGA0, Programmable Gain Amplifier Gain Selection 000 = 1 (Default) 001 = 2 www.DataSheet4U.com 010 = 4 011 = 8 100 = 16 101 = 32 110 = 64 111 = 128 Copyright Reserved CS1242 Specification Bit 5 Bit 4 Bit 3 ID1 ID0 Reserved Shenzhen Chipsea Technologies CO., LTD. www.chipsea.com LSB Bit 2 Bit 1 Bit 0 PGA2 ...
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... SETUP.5 : SPEED, Modulator Clock Speed Control SETUP.4 : BUF (Buffer Enable) SETUP.3 : BITOR, Set Bit Order For Output Data SETUP.2 : RAN, Range Selection SETUP.1-0 : DR1/DR0, (Data Rate) Copyright Reserved CS1242 Specification Bit 5 Bit 4 Bit 3 PS1 PS0 Bit 5 Bit 4 Bit 3 SPEED BUF ...
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... The Bias Current is 10uA (Default Bias Current Increase by 25 Bias Current Increase by 50%, When using a higher clock frequency, increasing the analog bias current will help improve the performance of the CS1242. CHSEL : Chopper-modulation Select www.DataSheet4U.com 0 = Chopper frequency is half the sample frequency of modulator, when PGA=1 to 128 is enabled (Default) ...
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... Data Output Register 0 (DOR0) (Address = 0FH, Reset Value = 00H) ADC Data MSB Bit 7 Bit 6 DOR07 DOR06 ADC data is composed of DOR0, DOR1 and DOR2. DOR23-00(totally 24 bits, DOR23 is MSB, DOR00 is LSB) Copyright Reserved CS1242 Specification Bit 5 Bit 4 Bit 3 GCC13 GCC12 GCC11 Bit 5 Bit 4 ...
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... CS1242 COMMAND DESCRIPTION The CS1242 has a series of commands, which control the working mode, working speed, calibration, etc. Some of the commands are single (such as RESET); some need operands (such as WREG, etc). Operands Amount (0-127 Register (0-15 Arbitrary value www.DataSheet4U.com 5.1 CS1242 COMMAND LIST Commands aggregate of the CS1242 is shown in Table 11. ...
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... After the DRDY goes low, it needs more than 10 t Operands: none Byte: 1 Encoding: 0000 0011 Data transmit sequence: DRDY SDI SDO DRDY SDO Copyright Reserved CS1242 Specification …….. 0000 0001 xxxx xxxx MSB …….. 0000 0011 uuu uuuu MSB MSB Mid-Byte Shenzhen Chipsea Technologies CO ...
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... The number of registers that will be written is one plus the value of the second byte. Operands Byte: 2 Encoding: 0101 rrrr xxxx nnnn Data transmit sequence: Write data to two registers, starting with the register 04H (DIO) Copyright Reserved CS1242 Specification xxx 0000 11111 0001 0001 0000 0001 …….. SDI 0101 0100 xxxx 0001 Shenzhen Chipsea Technologies CO ...
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... OCALSYS－System Offset Calibration Description: Perform system offset calibration. For a system offset calibration, the input should be set to 0V, and the CS1242 computes the OCC value that will compensate for offset errors. The OCC value is updated after this operation. 0V signal must be applied to the analog inputs, and the OCC register is updated automatically ...
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... Description: Synchronize the data of the CS1242 Operands: none Byte: 1 Encoding: 1111 1100 Data transmit sequence: SLEEP－Sleep Mode Description: Put the CS1242 into sleep mode. Use WAKEUP command to wake up from sleep mode. Operands: none Byte: 1 Encoding: 1111 1101 Data transmit sequence: RESET－Reset to Power-up Value Description: Restore the registers to their power-up values ...
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... CS1242 PACKAGE The CS1242 uses SSOP24 packaging, shown in the following figure. www.DataSheet4U.com Copyright Reserved CS1242 Specification Shenzhen Chipsea Technologies CO., LTD. www.chipsea.com 28 -28 ...